Matthew Pabst

dblp:331/3880 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2022
0000-0003-2456-9763ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache
0.612022
Practical Temporal Prefetching With Compressed On-Chip Metadata · IEEE Trans. Computers 2022
Memory systems › cache › prefetching
data prefetching
0.612022
Practical Temporal Prefetching With Compressed On-Chip Metadata · IEEE Trans. Computers 2022
Memory systems › cache management › cache partitioning
last-level cache partitioning
0.612022
Practical Temporal Prefetching With Compressed On-Chip Metadata · IEEE Trans. Computers 2022
Memory systems › cache › prefetching
temporal prefetching
0.612022
Practical Temporal Prefetching With Compressed On-Chip Metadata · IEEE Trans. Computers 2022

Methods — techniques the papers use, named apart from their topics

metadata compression · 0.6LLC metadata storage · 0.6
YearPublicationVenuePosition
2022 Practical Temporal Prefetching With Compressed On-Chip Metadata
abstract
Temporal prefetchers are powerful because they can prefetch irregular sequences of memory accesses, but temporal prefetchers are commercially infeasible because they store large amounts of metadata in DRAM. This article presents Triage, the first temporal data prefetcher that does not require off-chip metadata. Triage builds on two insights: (1) Metadata are not equally useful, so the less useful metadata need not be saved, and (2) for irregular workloads, it is more profitable to use portions of the LLC to store metadata than data. We also introduce novel schemes to identify useful metadata, to compress metadata, and to determine the fraction of the LLC to dedicate for metadata. Using an industrial-strength simulator running irregular workloads on a single-core system, we show that at a prefetch degree of 4, Triage improves performance by 41.1 percent compared to a baseline with no prefetching, whereas BO, a state-of-the-art prefetcher that uses only on-chip metadata, sees only 10.9 percent improvement. Compared with MISB, a temporal prefetcher that uses off-chip metadata, Triage provides a design alternative that reduces memory traffic by an order of magnitude (260.8 percent extra traffic for MISB at degree 1 versus 56.9 percent for Triage), while reducing coverage by 20 percent.
Krishnendra Nathella, Matthew Pabst, Dam Sunwoo, Akanksha Jain, Calvin Lin
IEEE Trans. Computers3