Test-point insertion (TPI) is an effective technique for improving the random pattern testability of digital circuits. However, it introduces area and performance overhead. Because the test-point area takes a significant portion of the test logic area, many techniques have been studied to reduce the area impact, such as sharing a control point (CP) driver with multiple CPs or replacing a dedicated CP driver with an existing flip-flop. This article proposes shared point insertion for area overhead reduction (SPAR) to simultaneously reduce the area impact of CPs and observation points (OPs). SPAR inserts a shared point instead of inserting a pair of CP and OP individually. Consequently, the pair of CP and OP is provided requirements, such as a control signal or propagation path from each other through the shared point—accordingly, the shared point simultaneously functions as the CP and OP. Furthermore, a signal that drives a shared point can be chosen to ensure the fair propagation of faults. The proposed flow searches for appropriate CP–OP pairs to insert shared points while avoiding potential issues from the newly created path. Experimental results on benchmarks demonstrate that SPAR can significantly reduce area overhead caused by test points while achieving almost identical or even slightly improved test coverage.