This paper presents a baseband transceiver architecture working at Sub-THz based on IEEE 802.15.3d. We propose an online self-adaptive compensator (OSAC) to deal with DC voltage offset (DCVO), frequency-independent IQ (FIIQ) mismatch, and frequency-dependent IQ (FDIQ) mismatch. For DCVO compensation, the residual DCVO in I/Q branch is improved from 75 mV / 75 mV to 0.0027 mV / 0.0024 mV. For FIIQ mismatch, the image rejection ratio (IMRR) is improved from 12.80 dB to 55.09 dB. For FDIQ mismatch, the IMRR can be improved from 26.02 dB to 73.38 dB. The hardware implementation of OSAC is operated at 3.52 GHz with the TSMC 16-nm FinFET CMOS process to achieve the data rate of 14.02 Gbps. The core area and power consumption of OSAC are 12769 μm2and 84.7 mW, respectively.

In this paper, a Golay-correlator SNR decision based universal threshold (GC-SNR-UT) method for channel estimation with frequency domain equalizer (FDE) in sub-THz band is proposed. The SNR decision based universal threshold denoising method combines the SNR decision mechanism with the threshold for mean square error optimization (TMSE) and the universal threshold formula. The simulation environment incorporates channel effect based on IEEE 802.15.3d standard and additive white Gaussian noise (AWGN). By implementing the proposed SNR decision based universal threshold (SNR-UT) denoising method, the computational complexity can be reduced by about 50% compared to the two-stage universal threshold, and non-linear operations are not required. Furthermore, it improves the required SNR by about 0.9 dB at the uncoded BER requirement of 1.9 ×10−4compared to results without any noise mitigation. Notably, it provides about a 2.2 dB margin to handle other non-ideal effects. In the hardware implementation, we use the TSMC 16 nm FinFET process to achieve a data transmission with a bandwidth of 3.52 GHz. The core area and power are 0.142 mm2and 654.2 mW, respectively for the proposed design.

In this paper, we propose an eigenvalue decomposition (EVD) based digital predistortion (DPD) design for nonlinear memory PAs in active antenna array structure with offline and time-variant scenario. The simulation environment incorporates various non-ideal effects based on IEEE Std 802.15.3d, the transmitter error vector magnitude (TX EVM) performance can be improved from -9.07dB to -20.64 dB in the presence of the proposed DPD. Furthermore, since the characteristics of the sub-THz power amplifiers are sensitive to temperature changes, we simulate the impact when the temperature rises from 27 °C to 125°C. This leads to inaccurate offline estimation, while with the proposed online tracking mechanism, the TX EVM can be improved from -13.34 dB to -20.05 dB. For the hardware implementation, we use 16-nm FinFET CMOS process with eight times parallelism architecture to achieve a data transmission with a bandwidth of 7.04GHz. The core area and power are 0.106 mm2 and 464.8 mW for the TX DPD, and 0.0576 mm2 and 252.0 mW for the receiver optimizer, respectively.

Channel estimation is a crucial issue for hybrid multiple-input multiple-output architecture of wideband wireless millimeter wave system. In this paper, we present a hardware implementation of channel estimation based on compressive sensing method. We exploit sparsity in channel space and take advantage of both the time domain and the frequency domain to effectively reduce the computational complexity. We then disassemble the sensing matrix into smaller dimensional matrices to further simply the sensing formula by utilizing the orthogonality of the DFT codebook. The sensing issue is solved by the generalized orthogonal matching pursuit with Cholesky decomposition techniques, which achieves a significant reduction in the number of computations. Finally, we evaluate the performance of the proposed method with the perfect channel state information, and hardware performance by fixed-point analysis and RTL design and synthesis results.