Traditional passive LC filters for EMI mitigation are becoming a bottleneck in achieving high power density in power electronic converters. Their large size, weight, and high cost have driven the search for alternative solutions. Active EMI filters have emerged as a suitable alternative to passive LC filters for providing mitigation. In this work, a differential mode active EMI filter is proposed for a high-frequency GaN-based totem-pole PFC converter. A second-order RC network is used to sense the noise voltage, and an RC network is employed to inject anti-noise to mitigate the DM noise. To address the stability problem caused by the two poles of the sensing network and one pole of the injection network below the 150 kHz range, a type II compensator is implemented. The zero introduced by the type II compensator is properly placed at the pole location of the injection network to mitigate its impact and achieve sufficient phase margin. The proposed method is experimentally verified on a totem-pole PFC converter, achieving 28 dBµV DM noise attenuation.

Planar transformers, favored for their high power density in bidirectional DC-DC power conversion applications, encounter challenges at higher frequencies and higher power levels due to increased stray capacitance. This issue is particularly pronounced with higher step ratios, where parasitic capacitance become more significant. In Dual Active Bridge (DAB) converters, such capacitance can cause elevated current ringing, especially on the high voltage (HV) side. To better understand the impact of stray capacitance in high step ratio planar transformers, it is essential to study this aspect with the help of designed prototypes featuring different winding structures. This article presents a comparative analysis of three different 5 kW, 1:29, 200 kHz prototypes to evaluate the cause and effect of parasitic capacitance at higher step ratios. By employing the vector fitting (VF) method, circuit parameters are extracted and simulated with their equivalent impedance models. Providing insights into minimizing the adverse effects of parasitic capacitance, the goal is to determine the optimal configuration for high power and high-frequency DAB converters.

A neuromorphic spiking convolutional neural network (SCNN) is presented for cross-patient seizure detection using multi-modal features from multi-channel electroencephalogram (EEG) data. A mixture of spectral, temporal, and spatial features is employed for building robustness against domain-specific noise/artifacts, hence boosting detection sensitivity and specificity. The feature set is converted to temporally-coded spikes before being fed to the SCNN classifier. Thanks to the asynchronous spike-based multiplier-less operation, the SCNN significantly reduces the classification computational cost without sacrificing accuracy. The developed algorithm was validated on a publicly available dataset and an average sensitivity of 83.02%, a specificity of 86.31%, and a false positive rate of 0.69/hr were achieved for cross-patient seizure detection. Our results show that a 1-bit Integer-Net leads to less than 2% drop in sensitivity compared with a 32-bit real-value resolution CNN model while offering more than 27× improvement in memory efficiency. The SCNN achieves an estimated energy efficiency of$1.28\mu\mathrm{J}$/classification, which translates into a 98.6% improvement compared to a conventional CNN implementation with the same accuracy.

An electroencephalogram (EEG) based non-invasive 2-channel System on Chip (SoC) is presented to detect and report the seizure event of the epileptic patient. The SoC incorporates an area and power-efficient dual-channel analog front-end (AFE) and machine learning-based differential difference approximate computing seizure detection ($\text{D}^{2}$ACSD) processor. The $\text{D}^{2}$ACSD processor integrates approximate computing feature extraction and fixed-point linear support vector machine (LSVM) classifier to minimize the area-and-power utilization. The AFE comprises of two duty-cycled resistive MOSFET (DCRM) capacitively coupled instrumentation amplifier ($\text{C}^{2}$IA), a programmable gain amplifier, and multiplexed SAR-ADC. The DCRM-C2IA utilizes proposed DCRM technique to boost the equivalent resistance of the integrator of the DC servo loop. The 5m$\text{m}^{2}$SoC is implemented in 0.18$\mu$m, CMOS process while achieving an average accuracy of 89.19%, sensitivity 92.18% and specificity 89.13% for the random and block-wise splitting of data in train/test sets. The implemented DCRM-C2IA achieves an integrated noise of 0.80$\mu$Vrms over 0.5-100Hz frequency band. The realized system consumes $2.7\mu \text{J}/$classification to continuously detect seizure onset for timely suppression.