Demo Data from EDBT 2026 / reviewers in the wild / expert
Haoxin Ren
dblp:333/4361
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › functional verification
constrained random verification |
0.7 | 1 | 2023 | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation · DAC 2023 |
Electronic design automation › hardware verification and test › coverage-driven verification
coverage closure |
0.7 | 1 | 2023 | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation · DAC 2023 |
Electronic design automation
hardware verification and test |
0.7 | 1 | 2023 | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation · DAC 2023 |
Electronic design automation › hardware verification and test › hardware verification
RTL simulation |
0.2 | 1 | 2023 | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional Simulation · DAC 2023 |
Methods — techniques the papers use, named apart from their topics
unsupervised learning · 0.7anomaly detection · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2023 | Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional SimulationabstractFunctional coverage closure is an important but RTL simulation intensive aspect of constrained random verification. To reduce these computational demands, we propose test selection for functional coverage via machine learning (ML) based anomaly detection in the structural coverage space of fast functional simulators. We achieve promising results on two units from a state-of-the-art production GPU design. With our approach, an up to 85% RTL simulation runtime reduction can be achieved when compared to baseline constrained random test selection while achieving the same RTL functional coverage. Rongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany |
DAC | 4 |