The CLLLC resonant converter, used for high-efficiency applications such as battery chargers, presents major challenges for real-time simulation, notably by its use at high frequencies and by the involvement of natural switching. Furthermore, the resonant nature and high-frequency AC transformer waveforms characterizing such converters make the simulation highly sensitive to sampling errors introduced by the discrete nature of the simulation. This work proposes an approach based on a reconfigurable switched matrix solver associated with explicit switch handling and implemented on a low-cost FPGA target to meet these requirements. The hardware architecture achieves a computational step size as low as 25 ns, even on an affordable FPGA platform. The algorithms, validated by comparison with SIMBA software, guarantee accuracy with relative errors of less than 2%. These results demonstrate the feasibility of using low-cost FPGAs for demanding applications, offering an effective solution for real-time simulation and control of high-frequency resonant converters. The model’s limitations are also explored, and avenues for improvement are proposed.

This paper proposes a novel approach for real-time simulation of high switching frequency power converters. Our method innovatively combines the direct mapped method (DMM) with the conventional explicit status handling (ESH) technique to accurately and efficiently model power electronic converters. Applied to the three-level neutral point clamped (NPC) dual active bridge (DAB) converter, our approach achieves a significantly reduced time-step when implemented on field-programmable gate arrays (FPGAs) while accounting for the natural commutation of diodes. Furthermore, this research demonstrates the feasibility of implementing the proposed method on low-cost FPGA systems, achieving time-steps ranging from 32 ns to 50 ns for the three-level NPC DAB test case.

International audience

Hardware-In-the-Loop (HIL) simulation is commonly used in multiple applications to validate control systems. Nevertheless, its application to high frequency power converters is particularly challenging due to the low time step required. This paper reports the setup of an HIL real time simulation bench, used to test the closed-loop control of a high frequency converter. A single phase interleaved bridgeless totem pole PFC running at a switching frequency of 100 kHz is simulated and driven by a C2000 microcontroller unit. The solver is based on a state-space representation and precomputed matrices, and implemented on a low-cost Artix-7 FPGA. Running with a time step as low as 50 ns, the simulation shows a good fidelity both in open-loop and closed-loop control. A detailed breakdown of error contributions is provided and analyzed in the frequency domain. Dynamic response analysis in closed-loop operation is also carried out comparing HIL results with an offline simulation and a small-signal model. The proposed bench shows the precomputed matrices method is reliable and accurate, with an excellent performance to platform cost ratio.