Demo Data from EDBT 2026 / reviewers in the wild / expert
Ken-ichi Kurosawa
dblp:34/3070
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 77% Programming languages and type systems · 23% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
compiler optimization |
0.0 | 1 | 1987 | High Performance Integrated Prolog Processor IPP · ISCA 1987 |
Processor architecture and microarchitecture
instruction set architecture |
0.0 | 1 | 1987 | High Performance Integrated Prolog Processor IPP · ISCA 1987 |
Processor architecture and microarchitecture › special-purpose processor
prolog processor |
0.0 | 1 | 1987 | High Performance Integrated Prolog Processor IPP · ISCA 1987 |
Programming languages and type systems
logic programming |
0.0 | 1 | 1987 | High Performance Integrated Prolog Processor IPP · ISCA 1987 |
Methods — techniques the papers use, named apart from their topics
integrated processor design · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1987 | High Performance Integrated Prolog Processor IPPabstractTo realize the highest performance possible for a sequential processor, and to realize utilization of a large amount of existing software, an integrated Prolog processor (IPP) and its optimized compiler are now being developed. Shigeo Abe, Tadaaki Bandoh, S. Yamaguchi, Ken-ichi Kurosawa, Kaori Kiriyama |
ISCA | 4 |