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William A. Havanki

dblp:34/372 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 100%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
instruction scheduling
0.011998
Treegion Scheduling for Wide Issue Processors · HPCA 1998
Processor architecture and microarchitecture
instruction-level parallelism
0.011998
Treegion Scheduling for Wide Issue Processors · HPCA 1998
Processor architecture and microarchitecture › superscalar processor
wide-issue processor
0.011998
Treegion Scheduling for Wide Issue Processors · HPCA 1998

Methods — techniques the papers use, named apart from their topics

heuristic scheduling · 0.0
YearPublicationVenuePosition
1998 Treegion Scheduling for Wide Issue Processors
abstract
Instruction scheduling is one of the most important phases of compilation for high-performance processors. A compiler typically divides a program into multiple regions of code and then schedules each region. Many past efforts have focused on linear regions such as traces and superblocks. The linearity of these regions can limit speculation, leading to under-utilization of processor resources, especially on wide-issue machines. A type of non-linear region called a treegion is presented in this paper. The formation and scheduling of treegions takes into account multiple execution paths, and the larger scope of treegions allows more speculation, leading to higher utilization and better performance. Multiple scheduling heuristics for treegions are compared against scheduling for several types of linear regions. Empirical results illustrate that instruction scheduling using treegions treegion scheduling-holds promise. Treegion scheduling using the global weight heuristic outperforms the next highest performing region-superblocks by up to 20%.
William A. Havanki, Sanjeev Banerjia, Thomas M. Conte
HPCA1
1997 Treegion Scheduling for Highly Parallel Processors
Sanjeev Banerjia, William A. Havanki, Thomas M. Conte
Euro-Par2