As the automotive market demands improved driving range in electric vehicles (EVs), highly efficient power electronics solutions are a focal point for researchers. Specifically, the low-voltage high-current nature of auxiliary power modules (APMs) with power ratings in the kilowatt range pose a challenge in hindering overall driving range of EVs. Three-port converters (TPCs) enable a highly efficient and power dense means of integrating the DC-DC portion of the on-board charger with the APM in a consolidated solution. To minimize the volume of the three-winding transformer, integrating the TPC, a two-stage APM is assumed in this article in which the second-stage consists of a synchronous buck converter (SBC) capable of 48 V to 9–16 V at 3.6 kW. With a maximum current of 250 A, phase interleaving of the SBC is necessary to improve overall power conversion efficiency. To ensure a sufficient balance of total volume and power loss, a design optimization framework for the SBC is presented in this article. Considerations of parameter variation, device and passive losses, and choice of non-coupled versus coupled inductors are the basis of the developed analytical models used in loss evaluation and inductor design. Results of the framework for 2060 unique designs are presented wherein trade-offs for three optimal designs are discussed yielding the final hardware demonstrator. Experimental results for power conversion efficiency are compared to the analytical model yielding a root mean square error of ~0.24% over the converter operating range.

Visible light communications (VLC) is a promising technology that combines the ubiquity of illumination devices with broadband communication to provide connectivity. The most recent VLC communication standards specify orthogonal frequency division multiplexing (OFDM) as the underlying modulation due to its spectral efficiency and compatibility with existing broadband modems. However, a key challenge remains in realizing VLC modulators capable of generating OFDM signal compatible with the primary illumination function, while ensuring the efficacy of the luminaires. In this paper, a novel method is proposed to integrate OFDM modulation into a switching power supply. Commutating diodes in the DC/DC converter are replaced by light-emitting diodes (LEDs) which are used for communication while the larger illumination string of LEDs is left unmodulated preserving the quality of illumination and luminaire lifetime. Biasing the switching MOSFET to its saturation region during its off states allows for the MOSFET to act as an amplifier, amplifying the OFDM communication signal and injecting it to the light-emitting commutating diode (LECD). As a result, energy efficient LED drivers capable of OFDM signal transmission are realized. Both simulation and experimental results are provided to demonstrate the feasibility of this approach, showcasing superior performance compared to existing literature in terms of component count, efficacy, illumination quality, and reliability. Notably, based on simulation results, the efficacy of our approach surpasses the bias-T approach by approximately 6.25%.

System reliability and design optimization are the main concerns in power electronic converters of more-electric aircraft (MEA). The dual active bridge (DAB) is the topology usually considered to link the HVDC bus to the LV network onboard the aircraft. This paper proposes a design and control algorithm that maximizes the power transmission efficiency by minimizing the transformer RMS current while considering the converter parasitic elements in the process. The optimization methodology includes two layers of optimization through a genetic algorithm (GA); optimization of transformer turns ratio and DAB inductor and phase angle optimization by using triple phase shift (TPS) control mode. The high-turn ratio of the isolating transformer utilized in this application results in a considerable effect on the converter performance. The parasitics effect is discussed and FEA simulations are carried out in Ansys Q3D from which the stray inductances are extracted and fed to the optimization algorithm.

The operating voltage of powertrains in Battery Electric Vehicles (BEVs) has witnessed an upward trend due to advantages in ultra-fast charging and reduction in run-time losses due to lower operating currents in the powertrain. Original Equipment Manufacturers (OEMs) such as Porsche, Audi, and Lucid Motors have introduced vehicles with powertrains operating from 800 V to 924 V. Due to increased switching losses at these voltage levels, the operation of DC-DC converters requires cascading of existing topologies or a multi-level operation. With increasing battery sizes, traditional Level-2 3.3 kW on-board chargers (OBCs) are deemed insufficient to fully complete a charge overnight. Thus, due to increasing voltage and power levels in commercial BEVs, this paper investigates the Grid to Vehicle (G2V) mode’s priority operating regions for a 11.5 kW Level-2 on-board charger in context of an 800 V powertrain. A design procedure for three potential DC-DC converter configurations is performed, and an optimization process is established. A multi-domain comparison highlighting the cost, advantages, and disadvantages of each configuration has been presented.

This paper presents a closed-form formulation to model the switching loss in single-phase dual active bridge converters (DAB). The proposed model is general and covers all modulation techniques with one, two, or three control parameters. Moreover, in this paper, the switching loss is minimized in a DAB converter controlled by the extended phase shift modulation (EPS) utilizing the model. In other words, the proposed loss model is used in a standard nonlinear optimization approach targeting the switching loss. By this optimization, the efficiency of the DAB converter is improved notably. Particularly, in IGBT-based converters with high switching loss, the optimization approach reveals significant improvement. In the designed 10kW DAB converter controlled by EPS modulation with optimal parameters, the switching loss is reduced by 22% compared to the traditional single-phase shift modulation (SPS). The total efficiency is increased by 0.6%, employing the proposed model and the optimization process.

This paper presents a new modular magnetic structure for high-power wireless Electric Vehicle (EV) charging. To increase the output power level and reduce the implementation costs, a modular multi-receiver magnetic structure is proposed. In this method, the receiver coils are placed in a specific spacing from each other to have zero mutual inductance between them. Therefore, the maximum transferable power will be increased and the circuits will operate independently. Moreover, a modular structure will reduce implementation costs. In this paper, a two-receiver coil and a three-receiver coil system are designed and the decoupling method is explained in detail. The resonant compensation networks are select for each system to supply 11 kW with a single receiver, 22 kW with a two-receiver coil and a 33 kW with a three-receiver coil system. The performance of these systems is analyzed and simulation results are presented to validate the feasibility of the system.

This paper presents a detailed PCB design for a 70kW 3-level Active Neutral Point Clamped traction inverter. The proposed design is focused on stray inductance reduction and thermal performance optimization. The voltage overshoot and maximum allowable stray inductance of the busbar are investigated in detail. Current density and its effect on the PCB temperature are analyzed using 3D finite element analysis.

High-speed medium-voltage (MV) adjustable speed drives (ASDs) are essential for gearless direct drive systems, offering reduced size and maintenance. High-speed applications include off-shore compressors in oil and gas industry, wind energy generation, and fly-wheel energy storage systems. This paper will cover the implications to cover a higher speed range (120-500Hz), arising from retrofitting existing MV 50/60 Hz cascaded H-bridge (CHB) ASDs. An essential requirement for the ASD is to remain within the Total Harmonic Distortion (THD) and Harmonic Voltage Factor (HVF) constraints set by standards. Key-aspects affecting CHB performance at high speeds are switching frequency and number of voltage levels. Another key-aspect is the CHB power cell DC-Link operational stress, power loss, and size. A unique comprehensive analysis covering all mentioned aspects is performed to provide a view of the MV high-speed application demands and needed High-Speed CHB design considerations.

This paper introduces a design methodology for a Switched Reluctance Motor (SRM) for an 80 kW Battery Electric Vehicle (BEV) propulsion application. The methodology aims to satisfy the high power density requirement targeted for an electric motor for a BEV application, while maintaining improved efficiency and torque quality. Iterative modeling effort has been employed for the design, including finite element analysis for the electromagnetic characteristics of the motor and dynamic modeling for performance analyses. The design approach starts with determining the motor geometry followed by sensitivity analysis for the motor performance considering various motor parameters. Then the SRM conduction angles are optimized with multi-objective genetic algorithm to improve the torque density and reduce torque ripple. The performance is further analyzed and compared to the target motor.

This paper proposes a new approach to fast detection of abnormal behaviour of cooling and IT systems in micro data centers (MDCs) based on machine learning (ML) techniques. Conventional protection of MDCs focuses on monitoring individual parameters such as temperature at different locations and when these parameters reaches certain high values, then alarm will be triggered. This paper employs ML techniques to extract normal and abnormal behaviour of the cooling and IT systems. Developed data acquisition system together with unsupervised learning methods quickly learns the physical dynamics of normal operation and is able to detect deviations from such behaviours. This provides an efficient way for not only producing health index for the MDC, but also a rich label logging system that will be used for the supervised learning methods. The effectiveness of the proposed detection technique is evaluated on a MDC placed at Computing Infrastructure Research Center (CIRC) in McMaster Innovation Park (MIP), McMaster University.

Recent field failure reports have showed that power cell faults represent the highest contributor to overall CHB converter failure rates. A big portion of these failures are related to power switches, capacitors, gate driver and control circuit boards. Focusing on power switches faults, they normally fail as short circuit or open circuit. Short circuits are dangerous events, however, there is standard method for fast neutralization. On the other hand, open circuit faults are not as fatal as short circuits. Nonetheless, in some situations, the load could not tolerate current imbalance caused by open circuit faults requiring an effective detection and identification method. In general, IGBT open circuit faults are more difficult to detect, and there is no standard method for detection. As a result, there is an industry need for detection, classification, and identification techniques that can perform effectively under different motor loading conditions. In this paper, a proposed method for classifying cell faults caused by IGBT open circuit is presented. Simulation results are provided in order to evaluate the performance of the proposed method.

This paper presents a control technique developed based on Sinusoidal Pulse Width Modulation (SPWM) to control the flying capacitors voltages' of a recently published six-level topology inverter. The presented inverter has a fewer number of components compared to the existing six-level topologies, which makes it a cost-efficient solution for medium-voltage applications. To produce a six-level voltage at the output of the inverter, the flying capacitors voltages should be controlled at their nominal values. The six-level inverter is controlled based on Space Vector Modulation scheme (SVM), which is complex and not convenient to implement. Therefore, a control method based on Sinusoidal Pulse Width Modulation (SPWM) technique is developed to control the capacitors voltages at different operating conditions. The simulation results in MATLAB/Simulink environment has been obtained to show the performance of the developed control method. A prototype of the proposed inverter is implemented, and the experimental results are given to show the feasibility of the proposed inverter with the developed control technique.

Recently, the finite control set model predictive control (FCS-MPC) has obtained a lot of attention for power converter control due to its advantages of high dynamic performance and multi-objective capability. However, it poses a challenge for the current processors directly applying this control to the multilevel inverter in real-time application. Especially for CHB-STATCOM multilevel inverter, there are a huge number of switching combinations and redundancies due to its topology structure. Real-time searching for the optimal switching state among the extremely large candidate pool through exhaustive search algorithm is almost impossible especially when the inverter output voltage levels increases. To end this problem, this paper has presented a new fast FCS-MPC formulation scheme based multilevel CHB-STATCOM. Instead of resorting to existing heuristic optimization algorithms, the FCS-MPC is reformulated mathematically to a matrix problem that can be easily solved on-line. The proposed single step FCS-MPC formulation is validated through simulation based on a seven levels CHB-STATCOM. It has been shown that the proposed single step MPC has the advantages of fast current tracking, minimum CMVphase-shiftedand good voltage balancing capability. Compared with the existing FCS-MPC schemes, the computational burden of the proposed MPC formulation is largely reduced which makes it more suitable for multilevel CHB-STATCOM. Moreover, the proposed FCS-MPC formulation can be easily developed and applied to other multilevel topologies with a large number of voltage levels and redundancy.

In this paper, a new nine-level voltage source inverter for medium-voltage high-power applications is proposed. The proposed topology is a combination of the active nested neutral-point clamped inverter and the flying capacitor inverter. A carrier-based sinusoidal pulse width modulation scheme is developed to balance the voltage of the flying capacitors using redundancy switching states. The steady state and transient performance of the proposed topology and the implemented control technique is analyzed and investigated under different modulation indices and load power factors. Finally, the effectiveness of the proposed controller to balance flying capacitor voltages is investigated and discussed.

This paper presents a new ZVZCS three-level inverter with T-type structure. The proposed inverter can achieve ZCS on arm switches and ZVS on neutral point switches by series connecting the arm switches with resonant inductors and parallel connecting the neutral point switches with resonant capacitors. The proposed inverter can achieve a significant reduction in power loss dissipation. In this paper, the operation principle of the proposed inverter is illustrated. The performance of the proposed inverter is verified through Matlab/Simulink environment.

This paper presents a comprehensive study on the state-of-the-art and emerging wind energy technologies from the electrical engineering perspective. In an attempt to decrease cost of energy, increase the wind energy conversion efficiency, reliability, power density, and comply with the stringent grid codes, the electric generators and power electronic converters have emerged in a rigorous manner. From the market based survey, the most successful generator-converter configurations are addressed along with few promising topologies available in the literature. The back-to-back connected converters, passive generator-side converters, converters for multiphase generators, and converters without intermediate dc-link are investigated for high-power wind energy conversion systems (WECS), and presented in low and medium voltage category. The onshore and offshore wind farm configurations are analyzed with respect to the series/parallel connection of wind turbine ac/dc output terminals, and high voltage ac/dc transmission. The fault-ride through compliance methods used in the induction and synchronous generator based WECS are also discussed. The past, present and future trends in megawatt WECS are reviewed in terms of mechanical and electrical technologies, integration to power systems, and control theory. The important survey results, and technical merits and demerits of various WECS electrical systems are summarized by tables. The list of current and future wind turbines are also provided along with technical details.

A new auxiliary circuit for an ac-dc single-stage power-factor-corrected (SSPFC) full-bridge-type converter is proposed in this paper. The new auxiliary circuit is simple, handles low power, and is active only when the converter is operating under light load conditions. In this paper, the operation of an SSPFC converter is briefly reviewed and the main principle behind the auxiliary circuit is explained. The new auxiliary circuit is introduced, its operation is explained, and its feasibility in a multilevel SSPFC is confirmed with experimental results.

This paper presents a new seven-level voltage source converter (VSC) for high-power medium-voltage (MV) motor drives. The proposed topology is composed of H-bridge connection of two nested neutral-point-clamped (NNPC) converters called 7L-HNNPC converter. This converter has interesting features such as operating over a wide-range of output voltages particularly for a range of (10kV-15kV) without the need for connecting power semiconductor in series, high quality output voltage, less number of components in compare to other classical seven-level topologies. A novel SPWM technique has been developed for the proposed 7L-HNNPC converter to control and balance of the flying capacitors. The outstanding property of the control strategy is that the control can be applied independently to each leg of the converter that reduces the complexity of the controller significantly. The performance of the proposed converter is studied under different operating conditions in the MATLAB/Simulink environment. The feasibility of the proposed converter is evaluated experimentally on a scale-down prototype.

A new space vector modulation method for common-mode voltage reduction in four-level nested neutral point clamped (NNPC) inverter is proposed in this paper. The proposed method employs switching states with minimal absolute common-mode voltages to synthesize given reference vectors. A variety of virtual vectors are constructed to facilitate the synthesis. The effect of dead time on common-mode voltage reduction is analyzed. Appropriate switching sequences are designed to avoid the effect. With the proposed method, the common-mode voltage of the inverter is reduced to 1/18 of dc-link voltage, 80% off compared with sinusoidal pulse width modulation (SPWM) and conventional space vector modulation (C-SVM), which contributes to the design of transformer-less medium voltage (MV) power conversion and drives. The proposed method is verified by simulation results.

This paper presents a new and simple method for capacitor voltages balancing of an n-level diode-clamped multilevel converters using space vector modulation (SVM). The proposed method introduces a generalized approach to calculate dc-link capacitor currents without the use of look-up tables for an n-level diode-clamped converter. This approach balances dc-link capacitor voltages based on minimum energy property. The performance of the proposed method has been studied for a three-level, four-level and five-level diode-clamped converter in MATLAB/Simulink environment.

A new interleaved single-stage ac-dc converter is proposed in this paper to reduce line current harmonics while achieving power factor correction. The proposed rectifier can produce input currents that do not have deadband regions with high power factor correction, continuous output current and minimize the input EMI filter size. In this paper, the operation of the new converter is explained, its features are discussed and its operation is confirmed with experimental results obtained from a prototype.