Demo Data from EDBT 2026 / reviewers in the wild / expert
V. C. V. Pratapa Reddy
dblp:34/4696
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1983
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 1 | 1983 | A Simple Random Test Procedure for Detecion of Single Intermittent Fault in Combinational Circuits · IEEE Trans. Computers 1983 |
Electronic design automation › hardware verification and test
random testing |
0.0 | 1 | 1983 | A Simple Random Test Procedure for Detecion of Single Intermittent Fault in Combinational Circuits · IEEE Trans. Computers 1983 |
Electronic design automation › hardware verification and test
combinational circuit testing |
0.0 | 1 | 1983 | A Simple Random Test Procedure for Detecion of Single Intermittent Fault in Combinational Circuits · IEEE Trans. Computers 1983 |
Methods — techniques the papers use, named apart from their topics
input vector probability assignment · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1983 | A Simple Random Test Procedure for Detecion of Single Intermittent Fault in Combinational CircuitsabstractThis paper suggests a method for near-optimal selection of input vector probabilities for random testing of intermittent faults in combinational circuits. The assignment of input vector probabilities is obtained by equalizing the quality factors of all test vectors in a simple way. It is shown that the degree of fault detection is comparable with that of Savir [2]. A. R. Virupakshia, V. C. V. Pratapa Reddy |
IEEE Trans. Computers | 2 |