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Brian B. Moore

dblp:34/5864 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Processor architecture and microarchitecture · 85% Memory systems · 15%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
vector processor
0.021988
The IBM System/370 Vector Architecture: Design Considerations · IEEE Trans. Computers 1988
Concepts of the System/370 Vector Architecture · ISCA 1987
Processor architecture and microarchitecture
instruction set architecture
0.011987
Concepts of the System/370 Vector Architecture · ISCA 1987
Processor architecture and microarchitecture
vector processing
0.011988
The IBM System/370 Vector Architecture: Design Considerations · IEEE Trans. Computers 1988
Memory systems
cache
0.011987
Concepts of the System/370 Vector Architecture · ISCA 1987
Memory systems › memory access patterns
strided access
0.011987
Concepts of the System/370 Vector Architecture · ISCA 1987

Methods — techniques the papers use, named apart from their topics

architectural analysis · 0.0
YearPublicationVenuePosition
1988 The IBM System/370 Vector Architecture: Design Considerations
abstract
The considerations that shaped the architecture of the IBM System/370 Vector Facility are reviewed. The architectural requirements, decisions, and innovations are summarized, and the rationale for the choices that were made is given. Issues related to vector function, performance, compatibility, migration, and integration with the rest of the System/370 architecture are covered.>
Andris Padegs, Brian B. Moore, Ronald M. Smith, Werner Buchholz
IEEE Trans. Computers2
1987 Concepts of the System/370 Vector Architecture
abstract
This paper discusses the performance, complexity and system-integration considerations that shaped the System/370 Vector Architecture [1, 9]. The architecture is intended for compatible systems providing a range of price and performance. The paper reviews the reasons for choosing a register-oriented architecture with compound instructions over storage-to-storage operations and vector-instruction chaining. Then it discusses the role of cache in stride-N storage accessing, and describes some new facilities introduced for control-program purposes.
Brian B. Moore, Andris Padegs, Ronald M. Smith, Werner Buchholz
ISCA1