Reconfigurable intelligent surface (RIS) is a key technology to control the communication environment in future wireless networks. Recently, beyond diagonal RIS (BD-RIS) emerged as a generalization of RIS achieving larger coverage through additional tunable impedance components interconnecting the RIS elements. However, conventional RIS and BD-RIS can effectively serve only users in their proximity, resulting in limited coverage. To overcome this limitation, in this paper, we investigate distributed RIS, whose elements are distributed over a wide region, in opposition to localized RIS commonly considered in the literature. The scaling laws of distributed BD-RIS reveal that it offers significant gains over distributed conventional RIS and localized BD-RIS, enabled by its interconnections allowing signal propagation within the BD-RIS. To assess the practical performance of distributed BD-RIS, we model and optimize BD-RIS with lossy interconnections through transmission line theory. Our model accounts for phase changes and losses over the BD-RIS interconnections arising when the interconnection lengths are not much smaller than the wavelength. Numerical results show that the performance of localized BD-RIS is only slightly impacted by losses, given the short interconnection lengths. Besides, distributed BD-RIS can achieve orders of magnitude of gains over conventional RIS, even in the presence of low losses.

A study of channel hardening in a large-scale antenna system has been carried out by means of indoor channel measurements over four frequency bands, 1.472 GHz, 2.6 GHz, 3.82 GHz and 4.16 GHz. NTNU's Reconfigurable Radio Network Platform has been used to record the channel estimates for 40 single user non-line of sight radio links to a 64 element wide-band antenna array. By examining the rms delay spread and the ratio of the normalized subcarrier to average SISO link power of the radio channel received by a single user after combination, the hardening of this equivalent channel is analyzed for various numbers of nodes. The channel hardening merits show consistent behaviour throughout the frequency bands. By combining 16 antennas the rms delay spread of the equivalent channel is reduced from above 100 ns to below 35 ns with significantly reduced variation in the channel power.

This paper proposes and discusses the architecture for a real‐time vehicular channel emulator capable of reproducing the input/output behavior of nonstationary time‐variant radio propagation channels in safety‐relevant vehicular scenarios. The vehicular channel emulator architecture aims at a hardware implementation which requires minimal hardware complexity for emulating channels with the varying delay‐Doppler characteristics of safety‐relevant vehicular scenarios. The varying delay‐Doppler characteristics require real‐time updates to the multipath propagation model for each local stationarity region. The vehicular channel emulator is used for benchmarking the packet error performance of commercial off‐the‐shelf (COTS) vehicular IEEE 802.11p modems and a fully software‐defined radio‐based IEEE 802.11p modem stack. The packet error ratio (PER) estimated from temporal averaging over a single virtual drive and the packet error probability (PEP) estimated from ensemble averaging over repeated virtual drives are evaluated and compared for the same vehicular scenario. The proposed architecture is realized as a virtual instrument on National Instruments™ LabVIEW. The National Instrument universal software radio peripheral with reconfigurable input‐output (USRP‐Rio) 2953R is used as the software‐defined radio platform for implementation; however, the results and considerations reported are of general purpose and can be applied to other platforms. Finally, we discuss the PER performance of the modem for two categories of vehicular channel models: a vehicular nonstationary channel model derived for urban single lane street crossing scenario of the DRIVEWAY’09 measurement campaign and the stationary ETSI models.

In this paper, the first class of low power current-based physically unclonable functions (PUFs) is introduced. The new PUF circuit is able to convert the analog variations present in device leakage currents to a unique digital quantity at high speed and low power. Robust digital responses are achieved with the new architecture in presence of fluctuations in operational conditions such as temperature and supply voltage. The experimental results suggest 3% response error rate under extreme temperature variations from -55°C to 125°C and 20% fluctuations in supply voltage. The PUF consumes 150 μWatt for a duration of 250 ps per each response bit (37.5 femto joules of energy per response bit).