The computational complexity of multiple-input multiple-output (MIMO) signal processing algorithms grows exponentially, resulting in increasing computational latency. Conventional approaches to reducing latency are predominantly algorithm-specific, addressing only limited components within the overall MIMO system. In this paper, we propose a novel arithmetic-level variable precision computing (VPC) scheme, introducing a new universal compatible methodology for computational latency reduction. The proposed arithmetic-level VPC dynamically assigns varying levels of computing precision to individual arithmetic operations within an algorithm and employs a Markovian process model with low-complexity computations to minimize additional complexity overhead introduced by VPC. Numerical simulations demonstrate that the proposed scheme significantly outperforms conventional fixed-length computing (FLC), achieving superior performance while maintaining the same level of average computing precision.