This paper presents a broadband Gallium Arsenide (GaAs) heterojunction bipolar transistor (HBT) Doherty power amplifier (DPA) that employs a lumped compensation network (LCN) and input phase correction technique for 5G applications. A LCN is utilized with an integrated impedance inverter to enhance output power back-off (OBO) efficiency across a wide frequency range. To mitigate the overdrive issue caused by the LCN under saturation, different input phase strategies are analyzed, and an on-chip coupler-based input phase correction network is introduced to maintain a constant phase difference between the carrier and peaking paths. The DPA is implemented using a 2$\mu $m GaAs HBT process and achieves broadband operation over 3.1-4.3 GHz with a fractional bandwidth exceeding 32%, covering the 5G n77 and n78 bands. Measurement results demonstrate a saturated output power of 32.73-33.77 dBm with a saturated power-added efficiency (PAE) of 39.54%-46.51%, a small-signal gain of 22.19-25.30 dB. At 6 dB OBO, the DPA maintains a PAE of 30.84%-34.95%. When tested with a 100 MHz bandwidth 64-QAM signal with 5.6 dB PAPR, the DPA achieves an average PAE of up to 34.3% and an adjacent channel power ratio (ACPR) better than -45.2 dBc after digital predistortion (DPD), demonstrating its potential for wideband 5G terminal applications.

Though Outphasing power amplifier (OPA) exhibits high efficiency across a wide dynamic power range, its frequency coverage is constrained, prompting novel design techniques to enable broadband or multi-band operation. This paper proposes a mode expansion methodology for OPAs that adopt a non-commensurate transmission line combiner (NCTLC). It is indicated in this paper that an NCTLC-based OPA has eight distinct operation modes by judiciously expanding the delta length and base length of the NCTLC, as well as reconfiguring the Outphasing angle. Theoretical analyses confirm that the performance advantages of the OPA can be preserved before and after mode expansion. It is precisely the multi-mode operation that enhances the design flexibility of NCTLC-based OPAs. Moreover, to efficiently design the NCTLC, a relationship between the back-off range of the OPA and the delta length of the NCTLC is established. For experimental validation, three prototypes are designed and fabricated using Wolfspeed CGH40010F devices. Among these, two single-band OPAs operate at 1.0 GHz and 1.2 GHz, and a dual-mode dual-band OPA operates at 1.96/2.48 GHz. The measurement results indicate that the saturation output power of all OPAs is greater than 43.1 dBm with drain efficiency (DE) of above 56%. In the meantime, the 6 dB back-off DEs of all OPAs exceed 50.5%.

This article presents a comprehensive theoretical analysis of the resilience demonstrated by the three-stage Doherty power amplifier (DPA) when operating under load mismatch conditions. Additionally, a novel reconfigurable three-stage DPA architecture is introduced, with the aim of enhancing resilience to load mismatch using exceptionally simple circuits and a one-dimensional (1D) control method. To validate the efficacy of this proposed architecture and control approach, a DPA prototype employing commercial gallium nitride (GaN) active devices has been designed and meticulously fabricated at 2 GHz. With a matched 50 Ω load, the fabricated three-stage DPA achieves a high-efficiency range of 9.5 dB with larger than 51% back-off drain efficiency (DE). Through the proposed 1D control, the DPA presents 47.0%–55.1% back-off efficiency with ≤ 2 dB power fluctuation at a 2:1 voltage standing wave ratio (VSWR) over a 360° phase span. When driven by a 20 MHz long-term evolution (LTE) signal with an 8 dB peak-to-average power ratio (PAPR), the DPA achieves 46.2%–53.9% average efficiency and better than −21 dBc adjacent channel power ratio (ACPR) without digital pre-distortion (DPD) under load mismatch conditions.

The input impedance of the post-matching network (PMN) is configured as a complex value. The parameter solution space is determined based on the fundamental principles of the Doherty power amplifier (DPA), enabling the DPA to achieve high efficiency at the output power back-off (OBO). The parameter solution space comprises three variables: the phase parameter of the output matching network for the carrier power amplifier (carrier PA), the phase parameter of the output matching network for the peaking power amplifier (peaking PA), and the input impedance of PMN. These parameters are optimized to enable the DPA to achieve high efficiency at the OBO. In this paper, a one-to-one mapping relationship is established between the frequency and the parameter solution space, allowing for a precise optimization of the DPA across a broad frequency range. Leveraging this mapping relationship, an asymmetric DPA designed to operate over the 1.8–2.6 GHz frequency band is designed and fabricated, demonstrating the feasibility and effectiveness of the proposed approach. Under continuous wave excitation, the test results show that the drain efficiency (DE) is 42.7%–56.4% at 9.5 dB OBO and the saturated DE is 45.8%–71.1%. The saturated output power of this DPA is 46.9–48.8 dBm with a gain of 5.5–8.0 dB at saturation. A 20-MHz long-term-evolution modulated signal with a peak-to-average power ratio of 8 dB is also applied to the fabricated DPA at 1.8, 2.1, and 2.6 GHz. Under these conditions, at 8 dB OBO, the DPA shows an adjacent channel power ratio always lower than 48 dBc after digital pre-distortion linearization.

This article presents a theoretical analysis and circuit design for an enhanced dual-mode reciprocal Doherty power amplifier (DM-RDPA). To achieve bandwidth enhancement, an improved combining load design strategy is proposed, providing more accurate back-off impedance across a wider target bandwidth. Additionally, a sweeping analysis method is developed to determine optimal design parameters. The enhanced combining load design space of the proposed DM-RDPA is visualized, providing an intuitive view of the appropriate impedance solution space. To validate this enhanced DM-RDPA architecture and the corresponding design analysis method, a prototype PA was designed and fabricated using commercial GaN transistors. The implemented PA achieves two different Doherty operation bands: 0.95-1.9 GHz (66.7% fractional bandwidth) in Mode I and 0.67-0.93 GHz (32.5% fractional bandwidth) in Mode II. Drain efficiency of 47.3%-62.2% and 44.7%-62.1% is obtained by the fabricated DPA at 6 dB back-off in Mode I and Mode II, respectively. When driven by a 20 MHz modulated signal with 8 dB peak to average power ratio (PAPR), the fabricated DPA presents higher than 42% average efficiency in both Mode I and Mode II.

Though Outphasing power amplifiers (OPAs) can maintain high efficiency over a large dynamic range, their bandwidth should be further extended to satisfy the wireless communication systems. This paper presents a complex combining method for designing wideband OPAs. Complex combining impedance is adopted to compensate the frequency dispersion of the active load modulation in the OPA, leading to an extended bandwidth. It is illustrated for the first time that the load modulation trajectories of the OPA can be corrected over a wide bandwidth by elaborately designing the complex combining impedance. Furthermore, a comprehensive theoretical analysis is conducted on the transmission-line based combiner to derive the complex load impedance needed at different frequency points, recovering the back-off efficiency of a broadband OPA. As a proof of concept, a broadband OPA operating over 1.7-2.2 GHz is designed and fabricated. The experimental results show the fabricated OPA delivers a maximum output power of 43.1-44.3 dBm with a drain efficiency of 63.4%-78.4%. Meanwhile, a 6-dB back-off drain efficiency of 45.5%-70.4% can also be achieved by the fabricated OPA.

This article presents the methodology for designing triple-mode Doherty power amplifier (DPA) with multi-band operation and extended high efficiency range. It is illustrated that three different Doherty operation modes can be realized by simply re-setting the gate bias voltages while the DPA circuits keep unchanged. By employing a novel reciprocal gate bias DPA architecture, five operation bands have been achieved by the proposed DPA with larger than 9 dB high efficiency power range. The active load modulation process and theoretical performance of proposed DPA are analyzed in detail for each mode. For verification, a commercial GaN transistors-based DPA is designed and implemented with 1.76–1.96 GHz band in Mode I, 1.13–1.20/2.48–2.58 GHz bands in Mode II and 0.7–0.76/2.34–2.40 GHz bands in Mode III. The fabricated DPA achieves 7.0–10.5 dB saturation gain, 44.18–46.86 dBm peak output power and 41.9%–61.5% back-off efficiency. When stimulated by a 10 MHz long term evolution (LTE) modulation signal with 8.6 dB peaking-to-average ratio (PAPR), the adjacent channel power ratio (ACPR) of the fabricated DPA is better than −45 dBc after digital pre-distortion at 0.73, 1.18 and 1.85 GHz.