Functional near-infrared spectroscopy (fNIRS) can be used to measure cortical hemodynamics, with advantages such as non-invasiveness, high spatial resolution, wearability, ease of use and relatively low cost. These features make it potentially suitable for translational applications such as brain-computer interface (BCI), neurofeedback, and personalized healthcare. However, fNIRS signals are susceptible to motion artifacts (MAs), which can obscure physiological information. Herein, we propose to deploy a denoising autoencoder (DAE) network on an STM32 microcontroller for real-time multichannel MA removal at the edge. The DAE model was trained on fNIRS data augmented with simulated MAs. It was deployed on the edge device without any performance degradation, outperforming the conventional wavelet-based methods. With an inference time of 38 ms, this implementation is well-suited for real-time processing of multi-channel fNIRS data. Additionally, the low memory usage and CPU workload of the model make it ideal for deployment on diverse microcontroller platforms. This work holds the potential to enable the wider applications of wearable fNIRS in practice.

Functional Near-Infrared Spectroscopy (fNIRS) is a neuroimaging method which can be implemented with a wearable form factor. However, the data of fNIRS can be affected by motion artifact, which is conventionally processed offline using MATLAB-based software package via a bulky PC. This study trains a Support Vector Machine (SVM) algorithm and proposes a hardware design approach based on an FPGA to achieve the first real-time fNIRS motion artifact detection. The SVM hardware architecture proposed here utilizes a partially sequential–partially parallel implementation of the classification algorithm where Support Vector channels are consolidated into a single oversampled channel. A high classification accuracy of 97.42%, low FPGA resource utilization of 38,354 look-up tables and 6024 flip-flops with 10.92 us latency is achieved, outperforming conventional CPU SVM methods. These results show that an FPGA-based fNIRS motion artifact detector can be exploited whilst meeting real-time and resource constraints that are crucial in high-performance reconfigurable hardware systems.

Functional Near-Infrared Spectroscopy (fNIRS) and its extension, Diffuse Optical Tomography (DOT), are emerging non-invasive neuroimaging techniques that measure brain activities by monitoring changes in blood oxygenation using near infrared light. However, motion artifacts from subject movements in fNIRS/DOT data could severely undermine data quality. Current solutions typically rely on offline methods executed on conventional computers in laboratories/hospitals, limiting real-time applications and flexibility in wider environments. To address these limitations, we present an FPGA-based multi-channel real-time motion artifact detection system. The proposed system, tested against an expert-annotated dataset, showcases encouraging overall performance, with a minimal delay of 2.75 ms across 12-channel raw fNIRS data, and boasts a sensitivity rate of 85.28% and accuracy of 87.06%. This efficiency is achieved using less than 10% of FPGA resources, underscoring that the proposed real-time processing system holds the potential to be scaled up to 3630 channels. These results indicate a promising avenue towards real-time motion artifact processing in large-size multi-channel fNIRS/DOT data. Our design lays the groundwork for its application in areas including wearable real-time functional brain imaging, brain-computer interfaces, human-robot interaction, and surgical monitoring.

Due to iterative matrix multiplications or gradient computations, machine learning modules often require a large amount of processing power and memory. As a result, they are often not feasible for use in wearable devices, which have limited processing power and memory. In this study, we propose an ultralow-power and real-time machine learning-based motion artifact detection module for functional near-infrared spectroscopy (fNIRS) systems. We achieved a high classification accuracy of 97.42%, low field-programmable gate array (FPGA) resource utilization of 38354 lookup tables and 6024 flip-flops, as well as low power consumption of 0.021 W in dynamic power. These results outperform conventional CPU support vector machine (SVM) methods and other state-of-the-art SVM implementations. This study has demonstrated that an FPGA-based fNIRS motion artifact classifier can be exploited while meeting low power and resource constraints, which are crucial in embedded hardware systems while keeping high classification accuracy.

This demonstration showcases a novel FPGA development pipeline for developing a low-power and real-time motion artefact detection module for a wearable functional near-infrared spectroscopy (fNIRS) processing system. We provide a brief overview of the development design flow for our learning-based motion artefact detector in a heterogeneous platform, as well as the evaluation method for removing motion artefacts, which are unwanted signal variations that occur due to subject motion during data acquisition.