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Okuhiko Ishizuka

dblp:35/2197 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1977
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 1 heaviest of 1, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › digital circuit design › threshold logic
threshold logic circuits		 0.011977
Synthesis of Multithreshold Tree Networks · IEEE Trans. Computers 1977

Methods — techniques the papers use, named apart from their topics

graphical method · 0.0
YearPublicationVenuePosition
1977 Synthesis of Multithreshold Tree Networks
abstract
-A multithreshold network realizes a multithreshold logic function of an equivalent analog excitation e which in turn could be realized by a weighted input network of Boolean variables. This correspondence presents the synthesis of multithreshold tree networks with conventional single-threshold elements. The maximum number of thresholds realized by the tree network is derived by using the graphical method. Each value of these thresholds can be set arbitrarily.
Okuhiko Ishizuka
 IEEE Trans. Computers1