This paper reports a new scalable behavioral modeling technique for silicon controlled rectifier (SCR) based electrostatic discharge (ESD) protection structures using Verilog-A language. Accurate models were developed for various low-triggering voltage SCR ESD (LVSCR) protection structures implemented in a foundry 180nm RF process, which were validated by circuit simulation and ESD measurement.

For decades, advances in integrated circuits (IC) have been driven by continuous scaling down of planar IC technologies. As IC scaling rapidly approaches to technical brick wall, 3D IC heterogeneous integration emerges as a viable solution for future integrated electronics. Future complex system-on-a-chip (SoC) requires high-performance active devices, and novel passive and supporting devices. This paper reviews recent advances in develop 3D magnetic-enhanced inductors and 3D on-chip electrostatic discharging (ESD) structures to achieve heterogeneous 3D ICs with high performance and reliability simultaneously.