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Keith Whisnant

dblp:35/5256 · DBLP profile ↗
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13ranked-venue papers
2as first author
0since 2021 · last 2008
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 1 first-authorSecurity and privacy · 6 · 1 first-authorSoftware engineering, systems software and programming languages · 2 · 1 first-authorDatabases, data management, data science and information retrieval · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Distributed systems · 41% Hardware reliability and fault tolerance · 41% Interconnection networks and networks-on-chip · 18%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance
software fault tolerance
0.122004
The Effects of an ARMOR-Based SIFT Environment on the Performance and Dependability of User Applications · IEEE Trans. Software Eng. 2004
Hierarchical Error Detection in a Software Implemented Fault Tolerance (SIFT) Environment · IEEE Trans. Knowl. Data Eng. 2000
Distributed systems
fault tolerance
0.132004
Hierarchical Error Detection in a Software Implemented Fault Tolerance (SIFT) Environment · IEEE Trans. Knowl. Data Eng. 2000
Chameleon: A Software Infrastructure for Adaptive Fault Tolerance · IEEE Trans. Parallel Distributed Syst. 1999
The Effects of an ARMOR-Based SIFT Environment on the Performance and Dependability of User Applications · IEEE Trans. Software Eng. 2004
Interconnection networks and networks-on-chip › error control
error detection and recovery
0.012004
The Effects of an ARMOR-Based SIFT Environment on the Performance and Dependability of User Applications · IEEE Trans. Software Eng. 2004
Hardware reliability and fault tolerance
error detection
0.012000
Hierarchical Error Detection in a Software Implemented Fault Tolerance (SIFT) Environment · IEEE Trans. Knowl. Data Eng. 2000
Distributed systems › fault tolerance › resilience
adaptive fault tolerance
0.011999
Chameleon: A Software Infrastructure for Adaptive Fault Tolerance · IEEE Trans. Parallel Distributed Syst. 1999
Distributed systems › fault tolerance
checkpointing
0.012004
The Effects of an ARMOR-Based SIFT Environment on the Performance and Dependability of User Applications · IEEE Trans. Software Eng. 2004
Distributed systems
replication
0.011999
Chameleon: A Software Infrastructure for Adaptive Fault Tolerance · IEEE Trans. Parallel Distributed Syst. 1999
Hardware reliability and fault tolerance › redundancy › modular redundancy
triple modular redundancy
0.011999
Chameleon: A Software Infrastructure for Adaptive Fault Tolerance · IEEE Trans. Parallel Distributed Syst. 1999

Methods — techniques the papers use, named apart from their topics

object-based incremental checkpointing · 0.0error injection · 0.0simulation · 0.0signature monitoring · 0.0software infrastructure · 0.0runtime reconfiguration · 0.0
YearPublicationVenuePosition
2008 Temperature-aware MPSoC scheduling for reducing hot spots and gradients
abstract
Thermal hot spots and temperature gradients on the die need to be minimized to manufacture reliable systems while meeting energy and performance constraints. In this work, we solve the task scheduling problem for multiprocessor system-on-chips (MPSoCs) using Integer Linear Programming (ILP). The goal of our optimization is minimizing the hot spots and balancing the temperature distribution on the die for a known set of tasks. Under the given assumptions about task characteristics, the solution is optimal. We compare our technique against optimal scheduling methods for energy minimization, energy balancing, and hot spot minimization, and show that our technique achieves significantly better thermal profiles. We also extend our technique to handle workload variations at runtime.
Ayse K. Coskun, Tajana Rosing, Keith Whisnant, Kenny C. Gross
ASP-DAC3
2008 Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs
abstract
Thermal hot spots and high temperature gradients degrade reliability and performance, and increase cooling costs and leakage power. In this paper, we explore the benefits of temperature-aware task scheduling for multiprocessor system-on-a-chip (MPSoC). We evaluate our techniques using workload characteristics collected from a real system by Sun's Continuous System Telemetry. We first solve the task scheduling problem statically using integer linear programming (ILP). The ILP solution is guaranteed to be optimal for the given assumptions for tasks. We formulate ILPs for minimizing energy, balancing energy, and reducing hot spots, and provide an extensive comparison of their thermal behavior against our technique. Our static solution can reduce the frequency of hot spots by 35%, spatial gradients by 85%, and thermal cycles by 61% in comparison to the ILP for minimizing energy. We then design dynamic scheduling policies at the OS-level with negligible performance overhead. Our adaptive dynamic policy reduces the frequency of high-magnitude thermal cycles and spatial gradients by around 50% and 90%, respectively, in comparison to state-of-the-art schedulers. Reactive thermal management strategies, such as thread migration, can be combined with our scheduling policy to further reduce hot spots, temperature variations, and the associated performance cost.
Ayse K. Coskun, Tajana Rosing, Keith Whisnant, Kenny C. Gross
IEEE Trans. Very Large Scale Integr. Syst.3
2007 Temperature aware task scheduling in MPSoCs
Ayse K. Coskun, Tajana Rosing, Keith Whisnant
DATE3
2004 Modeling and evaluating the security threats of transient errors in firewall software
Shuo Chen 0001, Jun Xu 0003, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer, Keith Whisnant
Perform. Evaluation5
2004 The Effects of an ARMOR-Based SIFT Environment on the Performance and Dependability of User Applications
abstract
Few, distributed software-implemented fault tolerance (SIFT) environments have been experimentally evaluated using substantial applications to show that they protect both themselves and the applications from errors. We present an experimental evaluation of a SIFT environment used to oversee spaceborne applications as part of the Remote Exploration and Experimentation (REE) program at the Jet Propulsion Laboratory. The SIFT environment is built around a set of self-checking ARMOR processes running on different machines that provide error detection and recovery services to themselves and to the REE applications. An evaluation methodology is presented in which over 28,000 errors were injected into both the SIFT processes and two representative REE applications. The experiments were split into three groups of error injections, with each group successively stressing the SIFT error detection and recovery more than the previous group. The results show that the SIFT environment added negligible overhead to the application's execution time during failure-free runs. Correlated failures affecting a SIFT process and application process are possible, but the division of detection and recovery responsibilities in the SIFT environment allows it to recover from these multiple failure scenarios. Only 28 cases were observed in which either the application failed to start or the SIFT environment failed to recognize that the application had completed. Further investigations showed that assertions within the SIFT processes-coupled with object-based incremental checkpointing-were effective in preventing system failures by protecting dynamic data within the SIFT processes.
Keith Whisnant, Ravishankar K. Iyer, Zbigniew T. Kalbarczyk, Phillip H. Jones, David A. Rennels, Raphael R. Some
IEEE Trans. Software Eng.1
2002 Evaluating the Security Threat of Firewall Data Corruption Caused by Transient Errors
abstract
This paper experimentally evaluates and models the error-caused security vulnerabilities and the resulting security violations of two Linux kernel firewalls: IPChains and Netfilter. There are two major aspects to this work: to conduct extensive error injection experiments on the Linux kernel and to quantify the possibility of error-caused security violations using a SAN (Stochastic Activity Network) model. The error injection experiments show that about 2% of errors injected into the firewall code segment cause security vulnerabilities. Two types of error-caused security vulnerabilities are distinguished: temporary, which disappear when the error disappears, and permanent, which persist even after the error is removed, as long as the system is not rebooted. Results from simulating the SAN model indicate that under an error rate of 0.1 error/day during a 1-year period in a networked system protected by 20 firewalls, 2 machines (on the average) will experience security violations. This indicates that error-caused security vulnerabilities can be a non-negligible source of a security threats to a highly secure system.
Shuo Chen 0001, Jun Xu 0003, Ravishankar K. Iyer, Keith Whisnant
DSN4
2002 An Experimental Evaluation of the REE SIFT Environment for Spaceborne Applications
abstract
Presents an experimental evaluation of a software-implemented fault tolerance (SIFT) environment built around a set of self-checking processes called ARMORs running on different machines that provide error detection and recovery services to themselves and to spaceborne scientific applications. The experiments are split into three groups of error injections, with each group successively stressing the SIFT error detection and recovery more than the previous group. The results show that the SIFT environment adds negligible overhead to the application during failure-free runs. Only 11 cases were observed in which either the application failed to start or the SIFT environment failed to recognize that the application had completed. Further investigations showed that assertions within the SIFT processes-coupled with object-based incremental checkpointing-were effective in preventing system failures by protecting dynamic data within the SIFT processes.
Keith Whisnant, Ravishankar K. Iyer, Raphael R. Some, David A. Rennels
DSN1
2002 Loose Synchronization of Multithreaded Replicas
abstract
Although multithreading can improve performance, it is a source of nondeterminism in application behavior. Existing approaches to replicating multithreaded applications either synchronize replicas at the interrupt level, at the expense of performance, or use a nonpreemptive deterministic scheduler at the expense of concurrency. This paper presents a loose synchronization algorithm for ensuring deterministic replica behavior while preserving concurrency. The algorithm synchronizes replica threads only on state updates by enforcing an equivalent order of mutex acquisitions across replicas.
Claudio Basile, Keith Whisnant, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
SRDS2
2001 A Framework for Database Audit and Control Flow Checking for a Wireless Telephone Network Controller
abstract
The paper presents the design and implementation of a dependability framework for a call-processing environment in a digital mobile telephone network controller. The framework contains a data audit subsystem to maintain the structural and semantic integrity of the database and a preemptive control flow checking technique, PECOS, to protect call-processing clients. Evaluation of the dependability-enhanced system is performed (using NFTAPE, a software-implemented error injection environment). The evaluation shows that for control flow errors in the client, the combination of PECOS and data audit eliminates fail-silence violations, reduces the incidence of client crashes, and eliminates client hangs. For database injections, data audit detects 85% of the errors and reduces the incidence of escaped errors. Evaluation of combined use of data and control checking (with error injection targeting the database and the client) shows coverage increase from 35% to 80% and indicates data flow errors as a key reason for error escapes.
Saurabh Bagchi, Keith Whisnant, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer, Ytzhak H. Levendel, Lawrence G. Votta
DSN3
2000 Demonstration of the Remote Exploration and Experimentation (REE) Fault-Tolerant Parallel-Processing Supercomputer for Spacecraft Onboard Scientific Data Processing
abstract
Concerns a demonstration of the REE Project's work to date. The demonstration is intended to simulate an REE system that might exist on a Mars rover, consisting of multiple COTS processors, a COTS network, a COTS node-level operating system, REE middleware, and an REE application. The specific application performs texture processing of images. It was chosen as a building block of automated geological processing that will eventually be used for both navigation and data processing. Because the COTS hardware is not radiation hardened, single-event-upset-induced soft errors will occur. These errors are simulated in the demonstration by use of a software-implemented fault-injector, and are injected at a rate much higher than is realistic for the sake of viewer interest. Both the application and the middleware contain mechanisms for both detection of and recovery from these faults, and these mechanisms are tested by this very high fault-rate. The consequence of the REE system being able to tolerate this fault rate while continuing to process data is that the system will easily be able to handle the true fault rate.
Fannie Chen, Loring Craymer, Jeff Deifik, Alvin J. Fogel, Daniel S. Katz, Alfred G. Silliman Jr., Raphael R. Some, Sean A. Upchurch, Keith Whisnant
DSN9
2000 Hierarchical Error Detection in a Software Implemented Fault Tolerance (SIFT) Environment
abstract
Proposes a hierarchical error detection framework for a software-implemented fault tolerance (SIFT) layer of a distributed system. A four-level error detection hierarchy is proposed in the context of Chameleon, a software environment for providing adaptive fault tolerance in an environment of commercial off-the-shelf (COTS) system components and software. The design and implementation of a software-based distributed signature monitoring scheme, which is central to the proposed four-level hierarchy, is described. Both intra-level and inter-level optimizations that minimize the overhead of detection and are capable of adapting to runtime requirements are proposed. The paper presents results from a prototype implementation of two levels of the error detection hierarchy and results of a detailed simulation of the overall environment. The results indicate a substantial increase in availability due to the detection framework and help in understanding the tradeoffs between overhead and coverage for different combinations of techniques.
Saurabh Bagchi, Balaji Srinivasan, Keith Whisnant, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
IEEE Trans. Knowl. Data Eng.3
1999 Chameleon: A Software Infrastructure for Adaptive Fault Tolerance
abstract
This paper presents Chameleon, an adaptive infrastructure, which allows different levels of availability requirements to be simultaneously supported in a networked environment. Chameleon provides dependability through the use of special ARMORs-Adaptive. Reconfigurable, and Mobile Objects for Reliability-that control all operations in the Chameleon environment. Three broad classes of ARMORs are defined: 1) Managers oversee other ARMORs and recover from failures in their subordinates. 2) Daemons provide communication gateways to the ARMORs at the host node. They also make available a host's resources to the Chameleon environment. 3) Common ARMORs implement specific techniques for providing application-required dependability. Employing ARMORs, Chameleon makes available different fault-tolerant configurations and maintains run-time adaptation to changes in the availability requirements of an application. Flexible ARMOR architecture allows their composition to be reconfigured at run-time, i.e., the ARMORs may dynamically adapt to changing application requirements. In this paper, we describe ARMOR architecture, including ARMOR class hierarchy, basic building blocks, ARMOR composition, and use of ARMOR factories. We present how ARMORs can be reconfigured and reengineered and demonstrate how the architecture serves our objective of providing an adaptive software infrastructure. To our knowledge, Chameleon is one of the few real implementations which enables multiple fault tolerance strategies to exist in the same environment and supports fault-tolerant execution of substantially off-the-shelf applications via a software infrastructure only. Chameleon provides fault tolerance from the application's point of view as well as from the software infrastructure's point of view. To demonstrate the Chameleon capabilities, we have implemented a prototype infrastructure which provides set of ARMORs to initialize the environment and to support the dual and TMR application execution modes. Through this testbed environment, we measure the execution overhead and recovery times from failures in the user application, the Chameleon ARMORs, the hardware, and the operating system.
Zbigniew T. Kalbarczyk, Ravishankar K. Iyer, Saurabh Bagchi, Keith Whisnant
IEEE Trans. Parallel Distributed Syst.4
1998 The Chameleon Infrastructure for Adaptive, Software Implemented Fault Tolerance
abstract
This paper presents Chameleon, an adaptive software infrastructure for supporting different levels of availability requirements in a heterogeneous networked environment. Chameleon provides dependability through the use of ARMORs-Adaptive, Reconfigurable, and Mobile Objects for Reliability. Three broad classes of ARMORs are defined: Managers, Daemons, and Common ARMORs. Key concepts that support adaptive fault tolerance include the construction of fault tolerance execution strategies from a comprehensive set of ARMORs, the creation of ARMORs from a library of reusable basic building blocks, the dynamic adaptation to changing fault tolerance requirements, and the ability to detect and recover from errors in applications and in ARMORs.
Saurabh Bagchi, Keith Whisnant, Zbigniew T. Kalbarczyk, Ravishankar K. Iyer
SRDS2