Demo Data from EDBT 2026 / reviewers in the wild / expert
Jorge Fernandez Villena
dblp:35/6248
· DBLP profile ↗
13ranked-venue papers
11as first author
0since 2021 · last 2016
0000-0002-0847-9090ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 13 · 11 first-authorSoftware engineering, systems software and programming languages · 6 · 4 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Electronic design automation · 96% Parallel and multicore computing · 4% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › circuit simulation
model order reduction |
0.5 | 4 | 2012 | Exploiting Parallelism for Improved Automation of Multidimensional Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 Multi-Dimensional Automatic Sampling Schemes for Multi-Point Modeling Methodologies · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 |
Electronic design automation
circuit simulation |
0.4 | 3 | 2012 | Exploiting Parallelism for Improved Automation of Multidimensional Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 Multi-Dimensional Automatic Sampling Schemes for Multi-Point Modeling Methodologies · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 |
Electronic design automation › circuit simulation › model order reduction
parameterized model order reduction |
0.2 | 2 | 2011 | Multi-Dimensional Automatic Sampling Schemes for Multi-Point Modeling Methodologies · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2010 |
Parallel and multicore computing
parallel programming models |
0.0 | 1 | 2012 | Exploiting Parallelism for Improved Automation of Multidimensional Model Order Reduction · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012 |
Methods — techniques the papers use, named apart from their topics
projection-based reduction · 0.3automated sample selection · 0.1error estimation · 0.1perturbation-based interconnection · 0.1passivity preservation · 0.1transfer function error estimation · 0.1residue minimization · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Variability and statistical analysis flow for dynamic linear systems with large number of inputs
A. Lucas Martins, Jorge Fernandez Villena, Luís Miguel Silveira |
DATE | 2 |
| 2014 | Efficient analysis of variability impact on interconnect lines and resistor networks
Jorge Fernandez Villena, Luís Miguel Silveira |
DATE | 1 |
| 2012 | Exploiting Parallelism for Improved Automation of Multidimensional Model Order ReductionabstractThis paper addresses the issue of automatically generating reduced order models of very large multidimensional systems. To tackle this problem we introduce an efficient parallel projection based model order reduction framework for parameterized linear systems. The underlying methodology is based on an automated multidimensional sample selection procedure that maximizes effectiveness in the generation of the projection basis. The parallel nature of the algorithm is efficiently exploited using both shared and distributed memory architectures. This leads to a highly scalable, automatic, and reliable parallel reduction scheme, able to handle very large systems depending on multiple parameters. In addition, the framework is general enough to provide a good approximation regardless of the model's representation or underlying nature, as will be demonstrated on a variety of benchmark examples. The method provides the potential to tackle, in an automatic fashion, extremely challenging models that would be otherwise difficult to address with existing sequential approaches. Jorge Fernandez Villena, Luís Miguel Silveira |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2011 | Fast statistical analysis of RC nets subject to manufacturing variabilitiesabstractThis paper proposes a highly efficient methodology for the statistical analysis of RC nets subject to manufacturing variabilities, based on the combination of parameterized RC extraction and structure-preserving parameterized model order reduction methods. The sensitivity-based layout-to-circuit extraction generates first-order Taylor series approximations of resistances and capacitances with respect to multiple geometric parameter variations. This formulation becomes the input of the parameterized model order reduction, which exploits the explicit parameter dependence to produce a linear combination of multiple non-parameterized transfer functions weighted by the parameter variations. Such a formulation enables a fast computation of statistical properties such as the standard deviation of the transfer function given the process spreads of the technology. Both the extraction and the reduction techniques avoid any parameter sampling. Therefore, the proposed method achieves a significant speed up compared to the Monte Carlo approaches. Yu Bi, Kees-Jan van der Kolk, Jorge Fernandez Villena, Luís Miguel Silveira, N. P. van der Meijs |
DATE | 3 |
| 2011 | Positive realization of reduced RLCM netsabstractModel Order Reduction is nowadays routinely applied as a basic step in order to enable the efficient simulation of very large RLC linear models, such as extracted parasitics and circuit oriented EM extraction. Often, such reduced models are synthetized as a subcircuit and ported to simulation environments for multiple subsequent runs. Such an approach is quite common as often designers prefer to work with circuit netlists as opposed to abstract mathematical representations and furthermore, many simulators can only handle circuit elements. However, the potential advantages provided by the reduction may be compromised when the dense reduced models are synthetized to netlists due to the presence of non-physical elements (such as negative RLC) or a large number of controlled sources. Such issues may hinder efficiency or even completely preclude analysis as many simulators cannot handle non-physical elements whose handling is altogether questionable. This paper proposes a methodology for the synthesis of reduced order models of general multiport RLC nets amenable to be included in standard simulation environments. Unlike other previously published approaches, the methodology generates very compact models while guaranteeing the positiveness of the RLC values, which allows their direct confinement in any SPICE-like circuit simulator. Jorge Fernandez Villena, Luís Miguel Silveira |
VLSI-SoC | 1 |
| 2011 | Multi-Dimensional Automatic Sampling Schemes for Multi-Point Modeling MethodologiesabstractThis paper presents a methodology for optimizing sample point selection in the context of model order reduction (MOR). The procedure iteratively selects samples from a large candidate set in order to identify a projection subspace that accurately captures system behavior. Samples are selected in an efficient and automatic manner based on their relevance measured through an error estimator. Projection vectors are computed only for the best samples according to the given criteria, thus minimizing the number of expensive solves. The scheme makes no prior assumptions on the system behavior, is general, and valid for single and multiple dimensions, with applicability on linear and parameterized MOR methodologies. The proposed approach is integrated into a multi-point MOR algorithm, with automatic sample and order selection based on a transfer function error estimation. Different implementations and improvements are proposed, and a wide range of results on a variety of industrial examples demonstrate the accuracy and robustness of the methodology. Jorge Fernandez Villena, Luís Miguel Silveira |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2010 | HORUS - high-dimensional Model Order Reduction via low moment-matching upgraded samplingabstractThis paper describes a Model Order Reduction algorithm for multi-dimensional parameterized systems, based on a sampling procedure which incorporates a low order moment matching paradigm into a multi-point based methodology. The procedure seeks to maximize the subspace generated by a given number of samples, selected among an initial candidate set. The selection is based on a global criteria that chooses the sample whose associated vector adds more information to the existing subspace. However, the initial candidate set can be extremely large for high-dimensional systems, and thus the procedure can be costly. To improve efficiency we propose a scheme to incorporate information from low order moments to the basis with small extra cost, in order to extend the approximation to a wider region around the selected point. This will allow reduction of the initial candidate set without decreasing the level of confidence.We further improve the procedure by generating the global subspace based on the composition of local approximations. To achieve this, the initial candidates will be split into subsets that will be considered as independent regions, and in a first phase the procedure applied locally thus enabling improved efficiency and providing a framework for almost perfect parallelization. Jorge Fernandez Villena, Luís Miguel Silveira |
DATE | 1 |
| 2010 | 3POr - Parallel projection based parameterized order reduction for multi-dimensional linear modelsabstractThis paper introduces a distributed and shared memory parallel projection based model order reduction framework for parameterized linear systems. The proposed methodology is based on a sampling scheme followed by a projection to build the reduced model. It exploits the parallel nature of the sampling methods to improve the efficiency of the basis generation. The sample selection scheme uses the residue as a proxy for the model error in order to improve automation and maximize the effectiveness of the sampling step. This yields an automatic and reliable methodology, able to handle large systems depending on the frequency and multiple parameters. The framework can be used in shared and distributed memory architectures separately or in conjunction. It is able to deal with different system representations and models of different characteristics, is highly scalable and the parallelization is very effective, as will be demonstrated on a variety of industrial benchmarks, with super linear speed-ups in certain cases. The methodology provides the potential to tackle large and complex models, depending on multiple parameters in an automatic fashion. Jorge Fernandez Villena, Luís Miguel Silveira |
ICCAD | 1 |
| 2010 | SPARE - A Scalable Algorithm for Passive, Structure Preserving, Parameter-Aware Model Order ReductionabstractThis paper describes a flexible and efficient new algorithm for model order reduction of parameterized systems. The method is based on the reformulation of the parameterized system as a perturbation-like parallel interconnection of the nominal transfer function and the nonparameterized transfer function sensitivities with respect to the parameter variations. Such a formulation reveals an explicit dependence on each parameter which is exploited by reducing each component system independently via a standard nonparameterized structure preserving algorithm. Therefore, the resulting smaller size interconnected system retains the structure of the original system with respect to parameter dependence. This allows for better accuracy control, enabling independent adaptive order determination with respect to each parameter and adding flexibility in simulation environments. It is shown that the method is efficiently scalable and preserves relevant system properties such as passivity. The new technique can handle fairly large parameter variations on systems whose outputs exhibit smooth dependence on the parameters, also allowing design space exploration to some degree. Several examples show that besides the added flexibility and control, when compared with competing algorithms, the proposed technique can, in some cases, produce smaller reduced models with potential accuracy gains. Jorge Fernandez Villena, Luís Miguel Silveira |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2009 | ARMS - automatic residue-minimization based sampling for multi-point modeling techniquesabstractThis paper describes an automatic methodology for optimizing sample point selection for using in the framework of model order reduction (MOR). The procedure, based on the maximization of the dimension of the subspace spanned by the samples, iteratively selects new samples in an efficient and automatic fashion, without computing the new vectors and with no prior assumptions on the system behavior. The scheme is general, and valid for single and multiple dimensions, with applicability on rational nominal MOR approaches, and on multi-dimensional sampling based parametric MOR methodologies. The paper also presents an integrated algorithm for multi-point MOR, with automatic sample and order selection based on the transfer function error estimation. Results on a variety of industrial examples demonstrate the accuracy and robustness of the technique. Jorge Fernandez Villena, Luís Miguel Silveira |
DAC | 1 |
| 2009 | On the efficient reduction of complete EM based parametric modelsabstractDue to higher integration and increasing frequency based effects, full electromagnetic models (EM) are needed for accurate prediction of the real behavior of integrated passives and interconnects. Furthermore, these structures are subject to parametric effects due to small variations of the geometric and physical properties of the inherent materials and manufacturing process. Accuracy requirements lead to huge models, which are expensive to simulate and this cost is increased when parameters and their effects are taken into account. This paper presents a complete procedure for efficient reduction of realistic, hierarchy aware, EM based parametric models. Knowledge of the structure of the problem is explicitly exploited using domain partitioning and novel electromagnetic connector modeling techniques to generate a hierarchical representation. This enables the efficient use of block parametric model order reduction techniques to generate block-wise compressed models that satisfy overall requirements, and provide accurate approximations of the complete EM behaviour, which are cheap to evaluate and simulate. Jorge Fernandez Villena, Gabriela Ciuprina, Daniel Ioan, Luís Miguel Silveira |
DATE | 1 |
| 2008 | SPARE - a Scalable algorithm for passive, structure preserving, Parameter-Aware model order REductionabstractIn this paper we describe a flexible and efficient new algorithm for model order reduction of parameterized systems. The method is based on the reformulation of the parametric system as a parallel interconnection of the nominal transfer function and the non-parametric transfer function sensitivities with respect to the parameter variations. Such a formulation reveals an explicit dependence on each parameter which is exploited by reducing each component system independently via a standard non-parametric structure preserving algorithm. Therefore, the resulting smaller size interconnected system retains the structure of the original with respect to parameter dependence. This allows for better accuracy control, enabling independent adaptive order determination with respect to each parameter and adding flexibility in simulation environments. It is shown that the method is efficiently scalable and preserves relevant system properties such as passivity. The new technique can handle fairly large parameter variations on systems whose outputs exhibit smooth dependence on the parameters. Several examples show that besides the added flexibility and control, when compared with competing algorithms, the proposed technique can, in some cases, produce smaller reduced models with potential accuracy gains. Jorge Fernandez Villena, Luís Miguel Silveira |
DATE | 1 |
| 2007 | Parametric structure-preserving model order reductionabstractAnalysis and verification environments for next- generation nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects, such as process variations and Electromagnetic (EM) couplings. Designed-in passives, substrate, interconnect and devices can no longer be treated in isolation as the interactions between them are becoming more relevant in the behavior of the complete system. At the same time variations in process parameters lead to small changes in the device characteristics that may directly affect system performance. These two effects, however, can not be treated separately as the process variations that modify the physical parameters of the devices also affect those same EM couplings. Accurately capturing the effects of process variations as well as the relevant EM coupling effects requires detailed models that become very expensive to simulate. Reduction techniques able to handle parametric descriptions of linear systems are necessary in order to obtain better simulation performance. In this work Model Order Reduction techniques able to handle parametric system descriptions are presented. Such techniques are based on Structure-Preserving formulations that are able to exploit the hierarchical system representation of designed- in blocks, substrate and interconnect, in order to obtain more efficient simulation models. Jorge Fernandez Villena, Wil H. A. Schilders, Luís Miguel Silveira |
VLSI-SoC | 1 |