EDBT 2026 Demo / reviewers in the wild / expert
Kun-Ming Ho
dblp:35/939
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1999
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Reconfigurable computing and FPGAs · 44% Integrated circuit design · 44% Electronic design automation · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Reconfigurable computing and FPGAs
FPGA arithmetic |
0.0 | 1 | 1999 | Module Generation of High Performance FPGA-Based Multipliers · FPGA 1999 |
Integrated circuit design › digital circuit design › arithmetic circuit design
multiplier design |
0.0 | 1 | 1999 | Module Generation of High Performance FPGA-Based Multipliers · FPGA 1999 |
Electronic design automation › physical design
module generation |
0.0 | 1 | 1999 | Module Generation of High Performance FPGA-Based Multipliers · FPGA 1999 |
Methods — techniques the papers use, named apart from their topics
module generation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1999 | Module Generation of High Performance FPGA-Based MultipliersabstractNo abstract available. Kun-Ming Ho, Allen C.-H. Wu |
FPGA | 1 |