Genki Kimura

dblp:352/6718 · DBLP profile ↗
← Back
5ranked-venue papers
3as first author
5since 2021 · last 2026
0009-0006-5740-9079ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Databases, data management, data science and information retrieval · 4 · 3 first-author · 4 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Adaptive GPU Compute Resource Allocation for Efficient High-Utility Itemset Mining
Tarun Sreepada, Tsuyoshi Ozawa, Genki Kimura, R. Uday Kiran, Kazuo Goda
DASFAA (5)3
2026 DPHIM: Efficient Parallel Mining of High-Utility Itemsets on Multicore Processors and Its Evaluation
abstract
High-utility itemset mining (HUIM) is an advanced problem of frequent itemset mining, considering the frequency of occurrence and quantitative criteria such as unit profit. Because HUIM can be applied to a broad spectrum of knowledge discovery work, various algorithmic improvements have been studied over the past two decades. On the other hand, limited efforts have been made to take advantage of hardware performance despite significant changes in hardware trends. This paper presents a novel parallelization method called DPHIM (Dynamic Parallelization for High-utility Itemset Mining). DPHIM dynamically decomposes a high-utility itemset mining task into subtasks to utilize logical parallelism and carefully assigns the subtasks and their related data to physical resources such as processing cores and nearby memory in a NUMA-aware manner. Through rigorous and diverse experiments, we found that DPHIM achieved speeds up to 72.7 times faster than the fully tuned serial execution, up to 23.5 times faster than static partitioning, and up to 2.5 times faster than the best case of alternative dynamic parallel executions for a variety of datasets and configurations on DRAM. We also demonstrated that DPHIM effectively worked on persistent memory; it offered similar thread scalability trends and was 1.1 to 2.4 times slower on persistent memory.
Genki Kimura, Yuto Hayamizu, R. Uday Kiran, Masaru Kitsuregawa, Kazuo Goda
IEEE Trans. Knowl. Data Eng.1
2024 Efficiently Adapting Stateless Model Checking for C11/C++11 to Mixed-Size Accesses
abstract
Abstract Stateless model checking (SMC) is crucial for productivity in verified concurrent programming, and its recent developments for C/C++ and weak memory models are remarkable. The state-of-the-art SMC for C, GenMC, efficiently verifies C programs based on C11 atomics and pthreads. However, it does not support mixed-size accesses, accesses to the same memory region with different-sized types, even though they are ubiquitous in C/C++, particularly the code for memory management. As a result, GenMC does not work for C/C++ programs containing memory management. To resolve this problem, we develop a method of adapting GenMC to mixed-size accesses preserving its optimality. We experimentally evaluate the efficiency of our extended implementation of GenMC and its efficacy for memory management programs.
Shigeyuki Sato 0001, Taiyo Mizuhashi, Genki Kimura, Kenjiro Taura
APLAS3
2023 Efficient Parallel Mining of High-utility Itemsets on Multicore Processors
abstract
High-utility itemset mining is a generalized problem of well-known frequent itemset mining, which considers not only the frequency of occurrence but also quantitative criteria such as unit profit. Because it can be applied to a wider spectrum of knowledge discovery work, various algorithmic improvements have been studied over the past two decades. On the other hand, limited efforts have been made to take advantage of hardware performance despite significant changes in hardware trends. This paper presents a novel parallelization method called DPHIM (Dynamic Parallelization for High-utility Itemset Mining). DPHIM dynamically decomposes the execution of high-utility itemset mining into subtasks in order to leverage logical data parallelism, and carefully assigns the subtasks and their related data to physical resources such as processing cores and nearby memory in the NUMA-aware manner. Our intensive and extensive experiments have confirmed that DPHIM performs up to 65.23 times faster than the fully-tuned serial execution, up to 23.54 times faster than static partitioning, and up to 2.51 times faster than the best case of alternative dynamic parallel executions for a variety of datasets and configurations on DRAM. As well, we have demonstrated that DPHIM effectively worked on persistent memory; it offered similar thread scalability trends and was 1.07 to 2.43 times slower on persistent memory.
Genki Kimura, Yuto Hayamizu, R. Uday Kiran, Masaru Kitsuregawa, Kazuo Goda
ICDE1
2023 Efficient Parallel Mining of High-utility Itemsets on Multicore Processors
abstract
High-utility itemset mining is a generalized problem of well-known frequent itemset mining, which considers not only the frequency of occurrence but also quantitative criteria such as unit profit. Because it can be applied to a wider spectrum of knowledge discovery work, various algorithmic improvements have been studied over the past two decades. On the other hand, limited efforts have been made to take advantage of hardware performance despite significant changes in hardware trends. This paper presents a novel parallelization method called DPHIM (Dynamic Parallelization for High-utility Itemset Mining). DPHIM dynamically decomposes the execution of high-utility itemset mining into subtasks in order to leverage logical data parallelism, and carefully assigns the subtasks and their related data to physical resources such as processing cores and nearby memory in the NUMA-aware manner. Our intensive and extensive experiments have confirmed that DPHIM performs up to 65.23 times faster than the fully-tuned serial execution, up to 23.54 times faster than static partitioning, and up to 2.51 times faster than the best case of alternative dynamic parallel executions for a variety of datasets and configurations on DRAM. As well, we have demonstrated that DPHIM effectively worked on persistent memory; it offered similar thread scalability trends and was 1.07 to 2.43 times slower on persistent memory.
Genki Kimura, Yuto Hayamizu, R. Uday Kiran, Masaru Kitsuregawa, Kazuo Goda
ICDE1