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Julian Pritzi

dblp:353/2747 · DBLP profile ↗
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5ranked-venue papers
0as first author
5since 2021 · last 2026
0009-0000-6332-0448ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 since 2021Software engineering, systems software and programming languages · 3 · 3 since 2021Computer networks · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Memory systems · 56% Cloud and datacenter computing · 20% Electronic design automation · 10%
Network and information security
2 papers
Hardware security and side channels · 100%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
trusted execution environments
1.922026
Wallet: Confidential Serverless Computing · NSDI 2026
TNIC: A Trusted NIC Architecture: A hardware-network substrate for building high-performance trustworthy distributed systems · ASPLOS (2) 2025
Memory systems
cache coherence
1.322026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures · ASPLOS (2) 2026
Memory systems › memory consistency
memory consistency model
1.322026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures · ASPLOS (2) 2026
Memory systems › cache coherence
cache-coherent interconnect
1.012026
vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures · ASPLOS (2) 2026
Memory systems › cache coherence
coherence controller
1.012026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
Cloud and datacenter computing › serverless computing
confidential serverless computing
1.012026
Wallet: Confidential Serverless Computing · NSDI 2026
Electronic design automation › hardware verification and test
hardware verification
1.012026
vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures · ASPLOS (2) 2026
Memory systems › cache coherence › cache coherence protocol
heterogeneous coherence
1.012026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
Cloud and datacenter computing
serverless computing
1.012026
Wallet: Confidential Serverless Computing · NSDI 2026
Distributed systems › fault tolerance
byzantine fault tolerance
0.912025
TNIC: A Trusted NIC Architecture: A hardware-network substrate for building high-performance trustworthy distributed systems · ASPLOS (2) 2025
Interconnection networks and networks-on-chip › high-speed interconnect
CXL interconnect
0.312026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
GPUs and heterogeneous computing
heterogeneous architecture
0.312026
C³: CXL Coherence Controllers for Heterogeneous Architectures · HPCA 2026
Hardware security and side channels › hardware security primitives
hardware root of trust
0.312025
TNIC: A Trusted NIC Architecture: A hardware-network substrate for building high-performance trustworthy distributed systems · ASPLOS (2) 2025

Methods — techniques the papers use, named apart from their topics

formal verification · 1.7SmartNIC acceleration · 1.7litmus testing · 1.0gem5 simulation · 1.0
YearPublicationVenuePosition
2026 vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures
abstract
Compute Express Link (CXL) offers byte-addressable, cache-coherent remote memory accesses across multiple hosts. Unfortunately, the CXL specification lacks mechanisms to ensure safe interoperability between heterogeneous host architectures with diverse cache coherence (CC) protocols and memory consistency models (MCMs). This semantic gap poses fundamental challenges and a significant barrier to adopting CXL in modern heterogeneous data centers.
Anatole Lefort, Julian Pritzi, Nicolò Carpentieri, David Schall, Simon Dittrich, Soham Chakraborty 0001, Nicolai Oswald, Pramod Bhatotia
ASPLOS (2)2
2026 C³: CXL Coherence Controllers for Heterogeneous Architectures
abstract
We introduce$\mathbf{C}^{\mathbf{3}}$, a systematic methodology for designing Compute Express Link (CXL) coherence controllers, to overcome interoperability challenges that arise from the mismatch of coherence protocols and memory consistency models in heterogeneous CXL-connected systems. Crucially, CXL lacks a unified heterogeneous computing interface, which can lead to unpredictable and inconsistent behavior when multiple heterogeneous devices decide to share cache-coherent CXL memory. C$^{3}$acts as a pivotal interface between diverse heterogeneous compute units, bridging the semantic differences without necessitating disruptive changes to existing system architectures. Our approach hinges on two key principles: delegating memory operations across coherence domains and enforcing atomicity at domain boundaries, thereby preserving the native memory consistency model semantics of each unit. We implement$\mathbf{C}^{\mathbf{3}}$as a generic gem5 model and validate its correctness through exhaustive litmus testing. We also show that$\mathbf{C}^{\mathbf{3}}$incurs minimal performance overhead compared to unified native coherence protocols.
Anatole Lefort, David Schall, Nicolò Carpentieri, Julian Pritzi, Soham Chakraborty 0001, Nicolai Oswald, Pramod Bhatotia
HPCA4
2026 Wallet: Confidential Serverless Computing
Patrick Sabanic, Masanori Misono, Teofil Bodea, Julian Pritzi, Michael Hackl, Dimitrios Stavrakakis, Pramod Bhatotia
NSDI4
2025 TNIC: A Trusted NIC Architecture: A hardware-network substrate for building high-performance trustworthy distributed systems
abstract
We introduce TNIC, a trusted NIC architecture for building trustworthy distributed systems deployed in heterogeneous, untrusted (Byzantine) cloud environments. TNIC builds a minimal, formally verified, silicon root-of-trust at the network interface level. We strive for three primary design goals: (1) a host CPU-agnostic unified security architecture by providing trustworthy network-level isolation; (2) a minimalistic and verifiable TCB based on a silicon root-of-trust by providing two core properties of transferable authentication and non-equivocation; and (3) a hardware-accelerated trustworthy network stack leveraging SmartNICs. Based on the TNIC architecture and associated network stack, we present a generic set of programming APIs and a recipe for building high-performance, trustworthy, distributed systems for Byzantine settings. We formally verify the safety and security properties of our TNIC while demonstrating its use by building four trustworthy distributed systems. Our evaluation of TNIC shows up to 6× performance improvement compared to CPU-centric TEE systems.
Dimitra Giantsidi, Julian Pritzi, Felix Gust, Antonios Katsarakis, Atsushi Koshiba, Pramod Bhatotia
ASPLOS (2)2
2025 Recipe: Hardware-Accelerated Replication Protocols: Rethinking Crash Fault Tolerance Protocols for Untrusted Cloud Environments
abstract
Today's modern hardware, with manycore servers, RDMA-capable networks and trusted execution environments, challenges the conventional wisdom about CFT protocols' design. We explore the synergy between modern hardware and the security and performance of strongly consistent replication protocols. Specifically, can we leverage (and how) modern cloud hardware to harden the security properties of a CFT protocol for Byzantine settings while achieving high performance?
Dimitra Giantsidi, Emmanouil Giortamis, Julian Pritzi, Maurice Bailleu, Manos Kapritsos, Pramod Bhatotia
Middleware3