Demo Data from EDBT 2026 / reviewers in the wild / expert
Xingyu Hou
dblp:355/2532
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 77% Parallel and multicore computing · 12% Memory systems · 12% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing › numerical linear algebra
dense linear algebra |
1.0 | 1 | 2026 | mtGEMM: An Efficient GEMM Library for Modern Multi-Core DSPs · IEEE Trans. Parallel Distributed Syst. 2026 |
High-performance computing › numerical linear algebra
matrix multiplication |
1.0 | 1 | 2026 | mtGEMM: An Efficient GEMM Library for Modern Multi-Core DSPs · IEEE Trans. Parallel Distributed Syst. 2026 |
Memory systems
memory access optimization |
0.3 | 1 | 2026 | mtGEMM: An Efficient GEMM Library for Modern Multi-Core DSPs · IEEE Trans. Parallel Distributed Syst. 2026 |
Parallel and multicore computing › parallel computing
multicore parallelism |
0.3 | 1 | 2026 | mtGEMM: An Efficient GEMM Library for Modern Multi-Core DSPs · IEEE Trans. Parallel Distributed Syst. 2026 |
Methods — techniques the papers use, named apart from their topics
transpose-GEMM · 1.0micro-kernel optimization · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | QoS-Aware Topology Management and Routing in Dual-Layer LEO Satellite Networks
Xingyu Hou, Sheng Wu 0001, Ye Li 0004, Haoge Jia, Sijing Ji |
IWCMC | 2 |
| 2026 | mtGEMM: An Efficient GEMM Library for Modern Multi-Core DSPsabstractThe General Matrix Multiplication (GEMM) is a crucial subprogram in high-performance computing (HPC). With the increasing importance of power and energy consumption, modern Digital Signal Processors (DSPs) are being integrated into general-purpose HPC systems. However, due to architecture disparities, traditional optimizations for CPUs and GPUs are not easily applicable to modern DSPs. This paper shares our experience of optimizing the GEMM operation using a CPU-DSP platform as a case study. Our work employs a set of strategies to improve the performance and scalability of GEMM. These strategies focus on developing micro-kernels based on heterogeneous on-chip memory, addressing the memory access bottleneck in multi-core parallelism, and facilitating efficient transpose-GEMM. These approaches, collectively referred to as an efficient and practical library (a.k.a.mtGEMM), maximize computational capabilities and bandwidth utilization of multi-core DSPs, while achieving high performance for variously-shaped GEMMs. Our experimental results demonstrate thatmtGEMMcan attain between 92% and 96% of the hardware peak, with the multi-core scalability being almost linear. Jianbin Fang, Kainan Yu, Peng Zhang 0061, Dezun Dong, Xinxin Qi, Xingyu Hou, Ruibo Wang, Kai Lu 0001 |
IEEE Trans. Parallel Distributed Syst. | 6 |