EDBT 2026 Demo / reviewers in the wild / expert
Eric Stuhr
dblp:356/7841
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2025
0009-0007-3576-2741ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 2 · 1 first-author · 2 since 2021Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Cloud and datacenter computing · 55% Processor architecture and microarchitecture · 20% Parallel and multicore computing · 15% |
Topics — the 5 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Cloud and datacenter computing
overload control |
1.5 | 2 | 2025 | CoreSync: A Protocol for Joint Core Scheduling and Overload Control of µs-Scale Tasks · ICNP 2025 Poster: Understanding Interactions between Overload Control Core Allocation in Low-Latency Network Stacks · SIGCOMM 2023 |
Cloud and datacenter computing › cluster resource management and scheduling
cluster resource management |
0.9 | 1 | 2025 | CoreSync: A Protocol for Joint Core Scheduling and Overload Control of µs-Scale Tasks · ICNP 2025 |
Processor architecture and microarchitecture › chip multiprocessor
core scheduling |
0.9 | 1 | 2025 | CoreSync: A Protocol for Joint Core Scheduling and Overload Control of µs-Scale Tasks · ICNP 2025 |
Parallel and multicore computing
processor allocation |
0.7 | 1 | 2023 | Poster: Understanding Interactions between Overload Control Core Allocation in Low-Latency Network Stacks · SIGCOMM 2023 |
Performance modeling and evaluation › simulation
simulation-based evaluation |
0.2 | 1 | 2023 | Poster: Understanding Interactions between Overload Control Core Allocation in Low-Latency Network Stacks · SIGCOMM 2023 |
Methods — techniques the papers use, named apart from their topics
synthetic and real-world workload evaluation · 0.9credit-based protocol · 0.9simulation · 0.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | CoreSync: A Protocol for Joint Core Scheduling and Overload Control of µs-Scale TasksabstractModern servers employ multiple resource management algorithms, including fast core schedulers and overload controllers to balance application performance and resource utilization. Individual algorithms and their amalgamation are required to meet these tight performance requirements. In this paper, we demonstrate that state-of-the-art core schedulers and overload controllers produce poor performance when deployed simultaneously. Fundamentally, the design assumptions of each controller are violated by the other controller. An overload controller assumes that all resources are dedicated to an application, while a core scheduler assumes that all incoming load will be admitted. To overcome this fundamental limitation, we present CoreSync, a server-driven credit-based protocol for joint core scheduling and overload control. CoreSync relies on the basic idea that the admitted load should be proportional to the allocated resources. However, strict proportionality can lead to low utilization when admitted load does not materialize at the server (e.g., when demand drops). Thus, CoreSync uses partial proportionality to balance latency, throughput, and utilization. Our evaluation across synthetic and real-world workloads shows that CoreSync outperforms state-of-the-art schedulers and overload controllers. In particular, in overload scenarios, CoreSync improves throughput by up to 6%. At low loads, CoreSync reduces the 99th percentile latency by up to 1.7× and improves CPU utilization by up to 1.4×. Bhaskar Pardeshi, Eric Stuhr, Ahmed Saeed 0001 |
ICNP | 2 |
| 2025 | Modeling the Interactions between Core Allocation and Overload Control in μs-Scale Network StacksabstractModern datacenter operators aim to maximize the utilization of limited and expensive resources, especially CPU cores. Achieving such an objective requires fast and accurate core scheduling policies. Meanwhile, operating at high utilization requires the employment of overload controllers that shed excess load beyond the allocated capacity. Currently, no analytical techniques exist to study the interactions between these controllers. In this paper, we use performance verification to establish bounds on the throughput and latency achieved by a server that employs state-of-the-art fine-grained core allocation and overload control mechanisms. Our model enables system performance analysis under a wide range of workload and system configurations (e.g., RTT, load, and burstiness). We show that worst-case throughput and latency degrade by $1.8 \times$ and $2.3 \times$, respectively, under high load and burstiness due to the interactions between overload control and fast core allocation. We validate our findings using simulations that demonstrate the plausibility of the identified worst-case behavior under realistic conditions. Jehad Hussien, Pratyush Sahu, Eric Stuhr, Ahmed Saeed 0001 |
MASCOTS | 3 |
| 2023 | Poster: Understanding Interactions between Overload Control Core Allocation in Low-Latency Network StacksabstractModern data center applications require servers to respond to requests from thousands of clients while maintaining micro-second-scale SLOs. Efficient operation of the data center infrastructure requires assigning the exact amount of resources needed by the application, no more and no less. A burst of incoming traffic that exceeds allocated capacity can cause long queues, requiring efficient and responsive overload control schemes. A sudden drop in demand requires re-allocation of resources to other applications. Within a single host, several mechanisms have been proposed for overload control [1, 3, 8, 9] and dynamic core allocation [2, 4, 6, 7]. The state of the art in both control loops is designed to react to microsecond-level changes in load. We present a simulation-based study of the interaction between Overload Controllers and Core Allocators at microsecond timescales, examining their macroscopic implications at larger timescales. Eric Stuhr, Ahmed Saeed 0001 |
SIGCOMM | 1 |