Demo Data from EDBT 2026 / reviewers in the wild / expert
Helin Cheng
dblp:356/8375
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2024
0009-0003-9379-4005ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 46% GPUs and heterogeneous computing · 46% Processor architecture and microarchitecture · 7% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
High-performance computing › iterative methods
algebraic multigrid |
0.8 | 1 | 2024 | AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024 |
GPUs and heterogeneous computing
GPU computing |
0.8 | 1 | 2024 | AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024 |
High-performance computing
scientific computing systems |
0.8 | 1 | 2024 | AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024 |
GPUs and heterogeneous computing › GPU computing
tensor cores |
0.8 | 1 | 2024 | AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024 |
Processor architecture and microarchitecture › computer arithmetic › floating-point arithmetic
mixed-precision arithmetic |
0.2 | 1 | 2024 | AmgT: Algebraic Multigrid Solver on Tensor Cores · SC 2024 |
Methods — techniques the papers use, named apart from their topics
sparse matrix-vector multiplication · 0.8sparse general matrix-matrix multiplication · 0.8mixed precision · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | AmgT: Algebraic Multigrid Solver on Tensor CoresabstractAlgebraic multigrid (AMG) methods are particularly efficient to solve a wide range of sparse linear systems, due to their good flexibility and adaptability. Even though modern parallel devices, such as GPUs, brought massive parallelism to AMG, the latest major hardware features, i.e., tensor core units and their low precision compute power, have not been exploited to accelerate AMG. This paper proposes AmgT, a new AMG solver that utilizes the tensor core and mixed precision ability of the latest GPUs during multiple phases of the AMG algorithm. Considering that the sparse general matrix-matrix multiplication (SpGEMM) and sparse matrix-vector multiplication (SpMV) are extensively used in the setup and solve phases, respectively, we propose a novel method based on a new unified sparse storage format that leverages tensor cores and their variable precision. Our method improves both the performance of GPU kernels, and also reduces the cost of format conversion in the whole data flow of AMG. To better utilize the algorithm components in existing libraries, the data format and compute kernels of the AmgT solver are incorporated into the HYPRE library. The experimental results on NVIDIA A100, H100 and AMD MI210 GPUs show that our AmgT outperforms the original GPU version of HYPRE by a factor of on geomean $1.46 \times, 1.32 \times$ and $2.24 \times$ (up to $2.10 \times, 2.06 \times$ and $3.67 \times$), respectively. Yuechen Lu, Lijie Zeng, Tengcheng Wang, Xu Fu, Helin Cheng, Dechuang Yang, Zhou Jin 0001, Marc Casas, Weifeng Liu 0002 |
SC | 6 |
| 2023 | HASpMV: Heterogeneity-Aware Sparse Matrix-Vector Multiplication on Modern Asymmetric Multicore ProcessorsabstractSparse matrix-vector multiplication (SpMV) is a fundamental routine in computational science and engineering. Its optimization methods on various homogeneous parallel processors, such as CPUs and GPUs, received much attention. Recently, asymmetric multicore processors (AMPs) have heterogeneous performance and efficient cores (e.g., P- and E-cores from Intel and Apple, or Big.LITTLE cores from ARM), or cores with different cache structures (e.g., cores with/without 3D V-Cache from AMD) are becoming one of the mainstream in desktop and workstation computers. However, there lacks heterogeneity-aware research on accelerating SpMV on AMPs.We in this paper propose a parallel algorithm called heterogeneity-aware SpMV (HASpMV) for improving the performance of SpMV on the latest 12th- and 13th-Gen AMPs from Intel and Ryzen 9 AMPs from AMD. We first micro-benchmark bandwidth and multi-/single-core SpMV to collect performance characteristics and to motivate our algorithm design, and then develop several optimization techniques to assign workloads between the two types of cores for achieving significantly better cache locality and load balancing. The experimental results show that compared to the latest version of the Intel oneMKL library and the open-source works CSR5 and merge-SpMV, HASpMV achieves an average speedup of 2.61x, 2.31x, and 3.73x (up to 5.23x, 4.46x, and 8.23x) on the i9-12900KF processor. On the i9-13900KF processor, HASpMV achieves an average speedup of 3.17x, 1.52x, and 2.23x (up to 9.46x, 5.31x, and 4.49x). Additionally, when comparing AMD Ryzen 9 7950X3D and 7950X AMPs, HASpMV brings an average speedup of 1.43x, 1.3x, and 1.29x (up to 6.28x, 7.8x, and 10.8x) over AMD Optimizing CPU Libraries (AOCL), CSR5, and merge-SpMV, respectively. Helin Cheng, Zhengyang Lu 0003, Yuechen Lu, Weifeng Liu 0002 |
CLUSTER | 2 |
| 2023 | HASpGEMM: Heterogeneity-Aware Sparse General Matrix-Matrix Multiplication on Modern Asymmetric Multicore ProcessorsabstractSparse general matrix-matrix multiplication (SpGEMM) is an important kernel in computational science and engineering, and has been widely studied on homogeneous processors, e.g., CPUs and GPUs. Recently, the asymmetric multicore processors (AMPs), composed of big and LITTLE cores from ARM, or of performance and efficient cores from Apple and Intel, are becoming the mainstream processors of modern computers. However, directly running the existing SpGEMM algorithms on AMPs easily leads to load imbalance problems due to the irregularity from both the sparse matrix side and the AMP side, and there is still a lack of parallel SpGEMM algorithm that can efficiently exploit the different cores on AMPs. Helin Cheng, Yuechen Lu, Weifeng Liu 0002 |
ICPP | 1 |