The emerging time-critical applications pose intense demands for enabling large-scale deterministic networks. In this paper, we propose a new Programmable Cycle-Specified Queue (PCSQ) for wide-area deterministic packet scheduling. We implement the first end-to-end high-precision rotation dequeuing, which enables microsecond-level time slot resource reservation (noted as T) and especially jitter control of up to 2T. We prototype the PCSQ scheduler on an FPGA. The PCSQ-enabled switches can guarantee bounded delay and jitter transmission on a realistic testbed.