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Yuhang Liang

dblp:359/7895 · DBLP profile ↗
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3ranked-venue papers
2as first author
3since 2021 · last 2026
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Computer networks · 1 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Physical-layer communications · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 50% High-performance computing · 50%
Artificial intelligence
1 paper
Deep learning architectures and training · 100%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications › synchronization › carrier synchronization
costas loop
1.012026
Necessary Condition for the Costas Loop to Track Desired Signal Under CW Interference · IEEE Trans. Commun. 2026
Physical-layer communications
synchronization
1.012026
Necessary Condition for the Costas Loop to Track Desired Signal Under CW Interference · IEEE Trans. Commun. 2026
Hardware reliability and fault tolerance › software fault tolerance
algorithm-based fault tolerance
0.912025
ATTNChecker: Highly-Optimized Fault Tolerant Attention for Large Language Model Training · PPoPP 2025
High-performance computing › large-scale training
large language model training
0.912025
ATTNChecker: Highly-Optimized Fault Tolerant Attention for Large Language Model Training · PPoPP 2025
Physical-layer communications › interference
continuous wave interference
0.312026
Necessary Condition for the Costas Loop to Track Desired Signal Under CW Interference · IEEE Trans. Commun. 2026
Physical-layer communications › synchronization
phase-locked loop
0.312026
Necessary Condition for the Costas Loop to Track Desired Signal Under CW Interference · IEEE Trans. Commun. 2026
Machine learning › Deep learning architectures and training › transformer
transformer training
0.312025
ATTNChecker: Highly-Optimized Fault Tolerant Attention for Large Language Model Training · PPoPP 2025

Methods — techniques the papers use, named apart from their topics

fault injection · 1.7checkpoint/restore · 1.7algorithm-based fault tolerance · 1.7second harmonic model · 1.0harmonic balance method · 1.0
YearPublicationVenuePosition
2026 Necessary Condition for the Costas Loop to Track Desired Signal Under CW Interference
abstract
When continuous wave (CW) interference is introduced into the Costas loop, the loop may lock onto the interference signal if the amplitude of the interference reaches a certain threshold, or if the carrier frequency of the interference signal is very close to that of the desired signal. This phenomenon in the Costas loop has not been thoroughly investigated to date. Although there have been studies on this phenomenon in Phase-Locked Loop (PLL), their results cannot be directly applied to the variant of PLL, Costas loop. This article investigates the necessary condition for the classic Costas loop to maintain tracking of the desired signal in the presence of CW interference. The necessary condition refers to the required relationship between the frequency difference and amplitude ratio of the interference and desired signals. Since the first harmonic model used for PLL cannot be directly applied to the Costas loop, this article proposes a second harmonic model. The proposed model is substituted into the steady-state equation of the Costas loop and solved using the harmonic balance method. The necessary condition for the Costas loop to maintain tracking of the desired signal is derived. Simulations demonstrate that the theoretical condition for tracking the desired signal is consistent with the simulation results.
Wenyi Wang 0003, Yuhang Liang
IEEE Trans. Commun.2
2025 ATTNChecker: Highly-Optimized Fault Tolerant Attention for Large Language Model Training
abstract
Large Language Models (LLMs) have demonstrated remarkable performance in various natural language processing tasks. However, the training of these models is computationally intensive and susceptible to faults, particularly in the attention mechanism, which is a critical component of transformer-based LLMs. In this paper, we investigate the impact of faults on LLM training, focusing on INF, NaN, and near-INF values in the computation results with systematic fault injection experiments. We observe the propagation patterns of these errors, which can trigger non-trainable states in the model and disrupt training, forcing the procedure to load from checkpoints. To mitigate the impact of these faults, we propose ATTNChecker, the first Algorithm-Based Fault Tolerance (ABFT) technique tailored for the attention mechanism in LLMs. ATTNChecker is designed based on fault propagation patterns of LLM and incorporates performance optimization to adapt to both system reliability and model vulnerability while providing lightweight protection for fast LLM training. Evaluations on four LLMs show that ATTNChecker incurs on average 7% overhead on training while detecting and correcting all extreme errors. Compared with the state-of-the-art checkpoint/restore approach, ATTNChecker reduces recovery overhead by up to 49×.
Yuhang Liang, Jie Ren 0015, Ang Li 0006, Bo Fang 0002, Jieyang Chen
PPoPP1
2023 Towards Polymorphic Adversarial Examples Generation for Short Text
abstract
NLP models are shown to be vulnerable to adversarial examples. The usual attack methods in NLP fields mainly focus on word-level perturbations. However, the word-substitution based method is not suitable for short text. Short texts are more susceptible to word substitution than long texts, which makes semantic shifting more likely to occur, and the number of words in short texts can be modified is small, making the attack difficult to succeed and hard to guarantee naturality and fluency. To tackle the above problems, we present Polymorphic Adversarial Examples Generation (PAEG) attack, a generative method by combining pre-trained language model BERT and Variational Autoencoder. Compared to attack methods proposed in previous literature, the proposed approach can not only generate polymorphic adversarial examples with different forms but also improve the attack success rate significantly on two popular datasets. Our codes are released at https://github.com/YilingLiang/vMF-VAE-Bert.
Yuhang Liang, Zheng Lin 0001, Fengcheng Yuan, Hanwen Zhang 0010, Lei Wang 0135, Weiping Wang 0005
ICASSP1