Demo Data from EDBT 2026 / reviewers in the wild / expert
William J. Herman
dblp:36/10971
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1983
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › interconnect modeling
parasitic capacitance extraction |
0.0 | 1 | 1983 | Hierarchical circuit extraction with detailed parasitic capacitance · DAC 1983 |
Electronic design automation › physical design
parasitic extraction |
0.0 | 1 | 1983 | Hierarchical circuit extraction with detailed parasitic capacitance · DAC 1983 |
Electronic design automation
interconnect modeling |
0.0 | 1 | 1983 | Hierarchical circuit extraction with detailed parasitic capacitance · DAC 1983 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1983 | Hierarchical circuit extraction with detailed parasitic capacitance
Gary M. Tarolli, William J. Herman |
DAC | 2 |