Terrestrial vegetation dynamics are important for climate variabilities but the understanding of how the vegetation dynamics respond to climate remains limited - not only because the tightly coupled climate-vegetation system makes it tricky to separate water-associated processes (e.g. precipitation and soil moisture) - but the sparse and uneven observations have made it difficult to quantify such links in a larger spatial view. Here, we relate the global vegetation - soil moisture feedbacks to their oscillation characteristics and interpret it in terms of plant-water functional traits from the satellite-based estimates of surface soil moisture (SSM) and normalized difference vegetation index (NDVI). We map the global vegetation - soil moisture oscillation time scales and investigate the spatial distribution across biomes. Our study gives a global quantification on vegetation-soil moisture dynamics, providing references for comparison related to water-and-plant functions with Earth system models.

In this study, we present a research to transfer the merits of SMAP (Soil Moisture Active Passive) to AMSR2 (Advanced Microwave Scanning Radiometer 2) with using machine learning method-artificial neural network. The surface soil moisture (SSM) products of SMAP were set as the reference data, while brightness temperature (TB) of various channels and the microwave vegetation index (MVI) obtained or derived from AMSR2 were input into an Artificial Neural Network (ANN). During training period (2015–2017), the ANN product (NNsm) can reproduce the SMAP SSM accurately, with a correlation coefficient (CC) of 0.74, Root Mean Square Error (RMSE) of 0.033 m3/m3, and Bias of −0.00008 m3/m3. It was found that machine learning method failed to provide reliable SSM over moderate vegetated areas where SMAP works well. With these trained networks, we developed a global soil moisture data set (named as NNsm) using AMSR2 TB from 2012 to 2018. Comparing to the in situ SM observations from all SCAN (Soil Climate Analysis Network) sites (named as SCANsm), NNsm has a good agreement with CC = 0.44, RMSE = 0.113 m3/m3and Bias = 0.030 m3/m3, which is much better than those of the AMSR2 SSM products from JAXA and LPRM.

With the emergence of many-core multiprocessor system-on-chips (MPSoCs), on-chip networks are facing serious challenges in providing fast communication among various tasks and cores. One promising on-chip network design approach shown in recent studies is to add express channels to traditional mesh network as shortcuts to bypass intermediate routers, thereby reducing packet latency. This approach not only changes the packet latency models, but also greatly affects network traffic behaviors, both of which have not been fully exploited in existing mapping algorithms. In this article, we explore the opportunities in optimizing application mapping for flattened butterfly, a popular express channel-based on-chip network. Specifically, we identify the unique characteristics of flattened butterfly, analyze the opportunities and new challenges, and propose an efficient heuristic mapping algorithm. The proposed algorithm Contention-Aware Latency Minimal (CALM) is able to reduce unnecessary turns that would otherwise impose additional router pipeline latency to packets, as well as adjust forwarding traffic to reduce network contention latency. Simulation results show that the proposed algorithm can achieve, on average, 3.4X reduction in the number of turns, 24.8% reduction in contention latency, and 14.12% reduction in the overall packet latency.

This paper addresses the problem of balancing the on-chip packet latencies in a chip multi-processor (CMP), which is simultaneously executing multiple applications. Specifically, this paper presents a balanced application-to-core mapping algorithm that aims to minimize the maximum on-chip packet latency of all running applications. The paper starts by formulating the balanced mapping problem for CMPs and proving its NP-completeness. Next it presents an efficient heuristic algorithm for solving the aforesaid problem, which utilizes the characteristics of on-chip cache and memory accesses in CMPs and takes into account the workload variations among applications. Simulation results on PARSEC benchmark suite show that the proposed algorithm lowers the maximum average packet latency of all applications by 11 percent while cutting the standard deviation of on-chip packet latencies by 99 percent. This is achieved by very little overhead in terms of the overall packet latency and power consumption averaged over all packets.

Hybrid electrical energy storage (HEES) systems have the potential to result in considerable cost savings by reducing the electric bills of home users. This paper first presents grid-connected dual-bank HEES system design and management to maximize the electric bill savings for residential users, and subsequently provides a comprehensive sensitivity analysis of the economic feasibility of residential HEES systems. Specifically, the paper describes a daily management policy based on energy buffering strategy with one bank as the main storage bank and the other as the energy buffering bank, and then derive the global design of HEES specifications based on the daily management results. Simulation results prove the effectiveness of energy buffering strategy and show the proposed HEES system is capable of bringing in profits under current input variables. Finally, a detailed analysis is conducted to show how each input variable affects the final design of the proposed residential HEES system and the maximum annual profits it achieves. Together with the design and control mechanism, the proposed analysis provides potential customers with the comprehensive knowledge of how HEES systems can be deployed to achieve savings in their electric bills.

With the emergence of many-core multiprocessor system-on-chips (MPSoCs), the on-chip networks are facing serious challenges in providing fast communication for various tasks and cores. One promising solution shown in recent studies is to add express channels to the network as shortcuts to bypass intermediate routers, thereby reducing packet latency. However, this approach also greatly changes the packet delay estimation and traffic behaviors of the network, both of which have not yet been exploited in existing mapping algorithms. In this paper, we explore the opportunities in optimizing application mapping for express channel-based on-chip networks. Specifically, we derive a new delay model for this type of networks, identify their unique characteristics, and propose an efficient heuristic mapping algorithm that increases the bypassing opportunities by reducing unnecessary turns that would otherwise impose the entire router pipeline delay to packets. Simulation results show that the proposed algorithm can achieve a 2∼4X reduction in the number of turns and 10∼26% reduction in the average packet delay.

To improve the cycle efficiency and peak output power density of energy storage systems in electric vehicles (EVs), supercapacitors have been proposed as auxiliary energy storage elements to complement the mainstream Lithium-ion (Li-ion) batteries. The performance of such a hybrid electrical energy storage (HEES) system is highly dependent on the implemented management policy. This paper presents a model-free reinforcement learning-based approach to dynamically manage the current flows from and into the battery and supercapacitor banks under various scenarios (combinations of EV specs and driving patterns). Experimental results demonstrate that the proposed approach achieves up to 25% higher efficiency compared to a Li-ion battery only storage system and outperforms other online HEES system control policies in all test cases.

As the number of cores continues to grow in chip multiprocessors (CMPs), application-to-core mapping algorithms that leverage the non-uniform on-chip resource access time have been receiving increasing attention. However, existing mapping methods for reducing overall packet latency cannot meet the requirement of balanced on-chip latency when multiple applications are present. In this paper, we address the looming issue of balancing minimized on-chip packet latency with performance-awareness in the multi-application mapping of CMPs. Specifically, the proposed mapping problem is formulated, its NP-completeness is proven, and an efficient heuristic-based algorithm for solving the problem is presented. Simulation results show that the proposed algorithm is able to reduce the maximum average packet latency by 10.42% and the standard deviation of packet latency by 99.65% among concurrently running applications and, at the same time, incur little degradation in the overall performance.

While power gating is a promising technique to reduce the static power consumption of network-on-chip (NoC), its effectiveness is often hindered by the requirement of maintaining network connec-tivity and the limited knowledge of traffic behaviors. In this paper, we present Smart Butterfly, a core-state-aware NoC power-gating scheme based on flattened butterfly that utilizes the active/sleep state information of processing cores to improve power-gating effectiveness. Smart Butterfly exploits the rich connectivity of the flattened butterfly topology to allow more on-chip routers to be power-gated when their attached cores are asleep. We present two heuristic algorithms to determine the set of routers to be turned on to maintain connectivity and allow tradeoff between power consumption and average packet latency. Simulation results show an average of 42.85% and 60.48% power reduction of Smart Butterfly over prior art on 4x4 and 8x8 networks, respectively.

This paper is the first to present a comprehensive analysis of the profitability of the hybrid electrical energy storage (HEES) systems while further providing a HEES design and control optimization framework to maximize the total return on investment (ROI). The solution consists of two steps: (i) Derivation of an optimal HEES management policy to maximize the daily energy cost saving and (ii) Optimal design of the HEES system to maximize the amortized annual profit under budget and system volume constraints. We consider a HEES system comprised of lead-acid and Li-ion batteries for a case study. The optimal HEES system achieves an annual ROI of up to 60% higher than a lead-acid battery-only system (Li-ion battery-only) system.

Cycle life of a battery largely varies according to the battery operating conditions, especially the battery temperature. In particular, batteries age much faster at high temperature. Extensive experiments have shown that the battery temperature varies dramatically during continuous charge or discharge process. This paper introduces a forced convection cooling technique for the batteries that power a portable system. Since the cooling fan is also powered by the same battery, it is critical to develop a highly effective, low power-consuming solution. In addition, there is a fundamental tradeoff between the service time of a battery equipped with fans and the cycle life of the same battery. In particular, as the fan speed is increased, the power dissipated by the fan goes up and hence the full charge capacity of the battery is lost at a faster rate, but at the same time, the battery temperature remains lower and hence the battery longevity increases. This is the first work that formulates the adaptive thermal management problem for batteries (ATMB) in portable systems and provides a systematic solution for it. A hierarchical algorithm combining reinforcement learning at the lower level and dynamic programming at the upper level is proposed to derive the ATMB policy.

Energy harvesting is a promising technique to overcome the limitation imposed by the finite energy capacity of batteries in conventional battery-powered embedded systems. In particular, the question of how one can achieve full energy autonomy (i.e., perpetual, battery-free operation) of a real-time embedded system with an energy harvesting capability (RTES-EH) by applying a global control strategy is investigated. The energy harvesting module is comprised of a Photovoltaic (PV) panel for harvesting energy and a supercapacitor for storing any excess energy. The global controller performs optimal operating point tracking for the PV panel, state-of-charge management for the supercapacitor, and energy-harvesting-aware real-time task scheduling with dynamic voltage and frequency scaling (DVFS) in the embedded load device. The controller, which accounts for dynamic V-I characteristics of the PV panel, terminal voltage variation and self-leakage of the supercapacitor, and power losses in voltage converters, employs a cascaded feedback control structure with an inner control loop determining the V-I operating point of the PV panel and an outer supervisory control loop performing real-time task scheduling and setting the voltage and frequency level in the embedded load device (to keep the state-of-charge of the supercapacitor in a desirable range). Experimental results show that the proposed global controller lowers the task drop rate in a RTES-EH by up to 60% compared with baseline controller within the same service time.

State-of-the-art electrical energy storage (EES) systems are mainly homogeneous, i.e., they consist of a single type of EES elements. None of the existing EES elements is capable of simultaneously fulfilling all the desired features of an ideal EES system, e.g., high charge/discharge efficiency, high energy density, low cost per unit capacity, long cycle life. A novel technology, i.e., a hybrid EES system that employs heterogeneous EES elements organized in a hierarchy of storage banks and linked by appropriate charge transfer interconnects, has shown great promise in overcoming the aforesaid limitations of conventional EES systems. However, the widespread adoption/deployment of hybrid EES systems is hampered by lack of a hybrid EES system simulator. This paper thus presents SIMES, a powerful and scalable simulator for hybrid EES systems, which provides fast and accurate system simulations, while accounting for key characteristics of various EES elements, power converters, charge transfer interconnect schemes, etc. Experimental results on two different applications (one targeting load shifting for households, the other related to battery rate capacity effect minimization in portable electronic devices) demonstrate the value and usefulness of SIMES for designing energy-aware facilities and products.

Partial shading is a serious obstacle to effective utilization of photovoltaic (PV) systems since it can result in significant output power degradation for the system. A PV system is organized as a series connection of PV modules, each module comprising of a number of series-parallel connected cells. This paper presents modified PV cell structures with integrated switches, imbalanced cell connection topologies for PV modules, and a dynamic programming algorithm to produce near-optimal reconfigurations of each PV module with the goal of maximizing the system output power level under any partial shading patterns. Through simulations, we have demonstrated up to a factor of 2.3X improvement in the output power level of a PV system comprised of 3 PV modules with 60 PV cells per module.

Dynamic power management (DPM) in battery-powered mobile systems attempts to achieve higher energy efficiency by selectively setting idle components to a sleep state. However, re-activating these components at a later time consumes a large amount of energy, which means that it will create a significant power draw from the battery supply in the system. This is known as the energy overhead of the “wakeup” operation. We start from the observation that, due to the rate capacity effect in Li-ion batteries which are commonly used to power mobile systems, the actual energy overhead is in fact larger than previously thought. Next we present a model-free reinforcement learning (RL) approach for an adaptive DPM framework in systems with bursty workloads, using a hybrid power supply comprised of Li-ion batteries and supercapacitors. Simulation results show that our technique enhances power efficiency by up to 9% compared to a battery-only power supply. Our RL-based DPM approach also achieves a much lower energy-delay product compared to a previously reported expert-based learning approach.