To overcome the drawbacks of conventional coreless transformers (CLTs), where smaller magnetizing inductance results in large reactive power circulating current and switches’ turn-off current, this paper proposes a variable magnetic permeability CLT for wide input voltage range DC-DC converters via anti-resonant winding. Compared with the resonant converter using conventional two-winding CLT, the proposed converter exhibits lower switching loss and conduction loss on the primary side. These advantages come from the fact that the magnetic permeability and magnetizing impedance of CLTs can be greatly increased by adding theLCanti-resonant winding. Besides, compared with the ferrite-core resonant converter, both have the same external characteristics, and crucially, the proposed converter has a lighter weight and smaller volume by multiplexing the leakage inductance into a resonant inductance, while ensuring ZVS and a wide input voltage range. A detailed analysis of the proposed converter, including the variable magnetic permeability, the voltage gain, and the wide voltage range modulation, is presented, and a design method is given. Finally, an experimental prototype with an input voltage range of 250-400V and 72V/1kW output is designed to verify the theoretical analysis.

In this article, an analytical model and robust design of parity-time (PT) symmetric CLLC coreless transformers (CLTs) with non-ideal parameters is proposed. Unlike the conventional design with ideal and equal resonant frequencies of the primary and secondary sides, a non-ideal design of resonance parameters is employed to avoid the unsteady frequency jump in the ideal PT-symmetric CLT. More critically, the non-ideal parameters and the effects of power loss on the voltage gain are analyzed and compensated to obtain the weak load-dependent voltage gain characteristic. First, the exact analytical model for the non-ideal PT-symmetric CLT is developed utilizing the Cardano formula. The results show that the frequency characteristics of multiple solutions can be significantly modified when the secondary resonant frequency is lower than the primary side. It has a narrower range and slower frequency change than the ideal design. Second, a non-ideal design methodology is given, considering frequency reliability and robust output voltage. Finally, a 600W experimental prototype is built for verification and comparison. The conversion efficiency of the non-ideal design is similar to the ideal design, and higher than the conventional leakage resonant CLT because of the lower turn-off current, circulating current, and switching frequency.

This paper systematically investigates the Hamiltonian characteristics of chaotic attractors in nonlinear circuits and elucidates the intrinsic energy transfer mechanisms in magnetically coupled nonlinear systems using generalized Hamiltonian theory. First, Hamiltonian properties of the Modified Van der Pol-Duffing (MVDPD) system, improved memristive Chua’s system, and Colpitts-derived Chua’s system are analyzed, establishing a unified relationship between system dynamics and Hamilton energy characteristics. Next, through numerical analysis, circuit simulation, and experimental validation, we investigate the internal mechanisms underlying energy exchange and dynamic evolution in magnetically coupled nonlinear circuits. Results demonstrate significant changes in energy exchange behaviors during phase synchronization. Specifically, the energy cost required for synchronization initially rises, peaks during the onset of synchronization, and then declines with improved internal coherence. These findings provide valuable insights into energy flow dynamics in magnetically coupled nonlinear circuits.

In the DC microgrid cluster system, due to the large number of converters, there are many operation modes and switching frequencies. The traditional modeling methods are difficult to balance the accuracy of the model and the simplicity of calculation and are not suitable for different switching frequency systems. In view of the above problems, this paper uses simplified discrete time mapping model to model the system. It combines the state space average model with the discrete time mapping model, which greatly improves the simplicity and accuracy of modeling. Taking the photovoltaic-energy storage system as an example, this paper analyzes the nonlinear behavior of the system and predicts the critical control parameters when the Hopf bifurcation occurs in the system. The eigenvalue sensitivity analysis is used to determine the eigenvalue change rate and change trend when the control parameters change, which provides guidance for the selection of parameters in practical applications. Finally, the high precision of the model is verified by simulation, and the applicability and effectiveness of the method in different switching frequency systems are verified by experiments.

Noise is one of the most critical factors affecting the reliability of power line communication (PLC) systems. However, current noise mitigation methods typically rely on noise characteristics analysis and often involve complex architectures, requiring different noise mitigation methods for various types of noise. To address the above issues, this article proposes a novel noise mitigation method based on chaotic synchronization, which shifts the focus from noise characteristics analysis to signal characteristics analysis through signal detection. As the signal behaviors follow deterministic theory, the method provides stronger noise mitigation capability and better adaptability. It is especially suitable for deployment in existing PLC systems, as it does not require any structural modifications. In this article, the characteristics of PLC signals modulated by orthogonal frequency division multiplexing are first analyzed. Then, a synchronization controller is designed based on the stability analysis of the perturbed system, with parameter update rules derived from adaptive chaotic synchronization theory. Next, a chaotic synchronization noise mitigation system is constructed using Chua’s circuit. Finally, the feasibility of the proposed method is verified through both simulations and experiments. The results show high consistency between simulation and experimental outcomes, demonstrating the robustness and effectiveness of the method. In future work, the method will be further enhanced by incorporating advanced digital control techniques, with the goal of achieving improved noise mitigation performance and broader applicability across real-world PLC scenarios.

Benefited from harmonics well-defined and easy design of filter, the ON-OFF voltage-mode control strategy suitable for the very-high-frequency (VHF, 30~300MHz) dc-dc converter has been developed in recent year. However, the potential risk of this control strategy is that unreasonable parameter design will lead to system instability. Moreover, the conventional stability methods are also difficult to adopt in VHF converters due to its feature of high circuit order and many operating modes as well as extremely high switching frequency. Hence, this article proposes a new stability analysis method suitable for VHF converter employing the ON-OFF voltage-mode control strategy. Firstly, the combined characteristic of short-period switching signal and long-period modulation signal is considered, which dividing the VHF converter into short-period open-loop system and long-period closed-loop system. Then, by establishing both system discrete iterative map models, the effect of converter and controller parameters on stability are revealed by using bifurcation diagram and eigenvalue locus as well as Jacobian matrix. As a result, the established system models and stability analysis can obtain the stability boundary and predict the nonlinear behavior, which helps to guide the parameters design to ensure system stability. Finally, experimental results evaluated the correctness of the theoretical analysis.

To reduce switching losses of very-high-frequency (VHF) DC-DC converters, the quasi-resonance method is popular for achieving soft-switching. Yet, the widely adopted Class E and Class$\Phi _{2}$circuits may result in high voltage stress on switching devices, making devices selection difficult. Focusing on this issue, the zero-voltage-transition (ZVT) technique is introduced into VHF DC-DC converters and a novel ZVT clamped VHF DC-DC topology is proposed in this paper. It consists of two boost units. And the drive signals of both MOSFETs are complementary and have a duty cycle of 0.5. And by appropriate design considerations, the parasitic parameters of both MOSFETs and both diodes are absorbed in the circuit. Moreover, the resonance operation of this circuit only occurs before and after the switching action. And thanks to the clamping effect of the diodes, the voltage stress on all switching devices is significantly limited. Finally, an experimental prototype with operating frequency of 10 MHz, 9 V input and 21 V/20 W output, is built to verify the performances of the proposed converter, which has a higher measurement efficiency of 88%.

Dynamic performance analysis and controller design of wireless power transfer (WPT) systems have always been tough problems because the existing dynamic models of WPT systems have disadvantages, such as high order, incompleteness, and lack of intuition. In this article, a dynamic modeling method based on a singular perturbation theory for a high-order WPT system with a Cuk-based bridgeless rectifier at the receiving side is proposed, which overcomes the disadvantages of the dynamic models mentioned above. In terms of time-scale separation characteristics brought by singular perturbation, a reduced-order model can be derived from the original high-order WPT system model. The proposed model is able to completely present the dynamic behaviors of the whole WPT system precisely. Also, a closed-loop control design method based on the reduced-order model is presented, which greatly simplifies the design process. The experimental results show the great effectiveness of the proposed model for transient state observation, and the output voltage or current of the closed-loop WPT system remains stable despite significant disturbances in load or transfer distance.

Chaotic pulse width modulation (PWM) is introduced to Boost converters to suppress its electromagnetic interference. However, the conventional stability criterion with linear modeling method is not accurate and unpractical for chaotic PWM Boost converters because of the chaotic dynamic characteristics and the switching frequency variation. In this paper, the describing function method is applied to model the switching process under chaotic PWM in Boost converters with considering the chaotic switching frequency. Further, based on the derived describing function, the accurate stability analysis criterion of chaotic PWM Boost converters can be obtained, the stable region is a little smaller compared with the conventional PWM with fixed switching frequency. Finally, the simulation and experiment results demonstrate the accuracy and effectiveness of the proposed describing function method based on a Boost converter. Therefore, this paper provides a stability analysis method for Boost converters under chaotic PWM.

This paper deals with a new single-stage high boost quasi-Z-source inverter based on the active switched Z-impedance network. The proposed inverter provides higher voltage boost factor, draws continuous input current, and shares the same ground between the input source and the bridge inverter. Compared with the traditional enhanced boost (quasi-)Z-source inverters (EB-ZSI/EB-qZSI), for two less inductors, one less capacitor, and one additional active switch used at the impedance network, the output voltage boost factor of the proposed inverter is twice as much as the EB-ZSI and EB-qZSI, which implies that it can use a very higher modulation index to provide improved quality output waveforms. Besides, for obtaining the same dc-ac output voltage gain, the proposed method has lower active switching voltage stress, lower passive component voltage ratings, and lower shoot-through current stress with lower input current ripple. The operation theory analysis, power loss calculation, simulation results, and performance comparison with other high boost impedance source inverters are presented. To verify the operating theory of the proposed inverter, a laboratory prototype based on the TMS320F28335 DSP was constructed and tested with 60 V dc input and ac 110 Vrms phase output. Finally, both simulations and the experimental results confirmed that the proposed inverter has high boost voltage inversion capability.

In order to solve the problem of the common-mode (CM) leakage current and obtain high efficiency of the transformerless photovoltaic (PV) system, a novel H6 based inverter with active clamping topology is proposed. The active clamping circuit prevents the resonance of the output inductors and the power switches' parasitic junction capacitance, so as to improve the suppression ability of the leakage current. Also, MOSFETs can be used in this typology to significantly reduce conduction losses as compared to the case with IGBTs. Meanwhile, the total harmonic distortion (THD) of the grid-connected current is very low due to no dead time between the main power switches in one PWM cycle. The working principle of the proposed topology, PWM modulation strategy, CM and differential-mode (DM) characteristics are analyzed. Finally, a 300 W experimental prototype was performed to verify the theoretical analysis, and experimental results show that the good performances with low CM leakage current of 11.257mA and high efficiency of 98.1%.

In this paper, a new family of nonisolated high step-up active switched boost quasi-Z-source inverters is proposed, which has an improved voltage boost inversion capability, joint the same ground between the dc source and bridge inverter, and draws continuous input current. In comparison to the traditional qZSIs, for the same total number of passive/active components used at the impedance network, the proposed inverter has lower voltage stress across the active switching devices, higher modulation index to improve the output waveform quality and lower input current ripple. The operating principle analysis, parameter design guideline and characteristic comparison with other high boost qZSIs have been presented. Finally, a laboratory prototype was constructed and tested with 60-V dc input and 110-Vrms ac output. And the experimental results have verified the effectiveness of the proposed topology.

The concept and technologies of fractional calculus have been increasingly applied to model and design circuits and electrical elements. In this work, by combining the principle of harmonic balance and equivalent small parameter method, we develop a new method of steady-state analysis for fractional-order DC-DC converters in discontinuous conduction mode (DCM). The effectiveness of the proposed scheme is confirmed by an example of fractional-order Boost converter in DCM. Both simulations and experimental results show that the periodic steady-state solutions of state variables obtained by the proposed scheme are accurate.

This paper proposes a novel quasi-Z source network with multiple switch-inductor (SL) cells and Cockroft-walton (CW) voltage multipliers. The proposed topology can further enhance the boost ability as the increasing of the count of the cascaded SL cells and CW cells. The utilization of CW cells at the output side can greatly reduce the voltage stress of the diodes and active switch, which makes the topology more suitable for dc-dc power conversion where higher gain and lower voltage stress are demanded. The performance of the topology is analyzed and a scale-down 180 W prototype is implemented to verify the theoretical analysis.

According to the system characteristics of closed-loop dc-dc converter, a periodic switched affine systems model of the power regulator is established. Based on switched systems theories, an corresponding augmented periodic switched autonomous systems model is presented by augmentations of the state variables. Thus, the relatively simple transfer matrix multipliers of the augmented systems are used to predict the onset of unstable behaviors. Meanwhile, the stability property is deduced and the steady boundary is obtained by the presented theorem. The stability of buck converter with constant on time One-Cycle Control strategy is analyzed. The results show that the pulse frequency modulation buck converter operating under the continuous-conduction-mode is stable. The system model proposed in this paper is an accurate model of the dc-dc converter. The resulting stability criterion is simple and intuitive, which can be applied to other periodic switched affine systems, including PFM or PWM power converters.

This paper proposes a transient modeling and analysis method for the fractional-order DC-DC converters in continuous conduction mode (CCM), in which a fractional-order Buck converter is taken as an example. By extending the usage of equivalent small parameter method (ESP), the converter is modeled by a general state vector differential equation. Then by adopting the principle of harmonic balance, fractional differential of state variables is converted into linear operations of exponential functions, and different harmonic are separated. Thus the main transient oscillation components of state variables can be obtained according to Grünwald-Letnikov's definition of fractional derivation, and the data are processed approximately by polynomial fitting of triangular functions. The results are introduced back to the model to obtain the values of the rest harmonic magnitudes. So the final solution of state variables is in the form of the summation of harmonic contents. To confirm the correctness of the results of the proposed method, waveforms of the analytical solution are put together with those from circuit simulation in PSIM. These results demonstrate the high effectiveness of the proposed method.

Based on the fact that both the phase and amplitude characteristics of fractional capacitor are related to its order, the introduction of fractional capacitor will make power factor correction (PFC) more flexible compared with the one using conventional capacitor. In order to verify the PFC function with fractional capacitor, an equivalent fractional capacitor model composed of an inverter and a resistor in series is presented in this paper. As the inverter is served as a controlled voltage source, the order of the proposed fractional capacitor can be varied between 0 and 2 easily just by changing the control parameters of the inverter, and the power level of the fractional capacitor model is the same as that of the inverter, which is able to be used in high power occasion. Finally, the simulation and experimental results are provided to validate the feasibility of power factor corrector with the proposed fractional capacitor model.

A new method of steady-state analysis for non-integer order DC/DC converters operating in continuous-conduction-mode (CCM) is put forward. First, the periodic and time-variant non-integer order DC/DC converter system is modeled by a nonlinear vector differential equation. Then by combining the principle of harmonic balance and equivalent small parameter method, the vector differential equation is solved, and analytical periodic steady-state solutions are obtained. The analytical results on a non-integer order Boost converter agree well with those obtained by modeling simulations using MATLAB software.

The topology of modular multilevel converters (MMC) is investigated in this paper. First, single phase half bridge inverter with split wound coupled inductors was studied, it was found that more voltage levels can be generated by using split wound coupled inductors. Therefore, new MMC topology was proposed by the analysis result, therein, two more diodes were used for each arm, and split wound coupled inductors were applied to the modular multilevel converter (MMC) to replace the current-limiting inductors. The theoretic analysis and simulation results have verified that, the number of the voltage levels of modular multilevel inverter has increased from n levels to 2n-3 levels, thus slew rate of the voltage (dv/dt) was suppressed and the total harmonic distortion (THD) was reduced.

On the basis of summarizing the advantages and disadvantages of present phase-modular three-phase power factor correction (PFC) converters, this paper proposes the phase-modular three-phase isolated bridgeless Sepic and Cuk PFC converter. The proposed converters are implemented by star connection of single-phase isolated bridgeless Sepic and Cuk PFC converter. The proposed converters not only can reduce the conduction losses caused by rectifier diodes, but also can achieve zero voltage switching. Additionally, the proposed converters only use a simple control loop to regulate the output voltage and make the input current in phase with the input voltage in DCM, which sufficiently reduces the complexity of control strategy. Due to the same behavior of two proposed converter, only the detailed operating principle, simulation and experimental results of the phase-modular three-phase isolated bridgeless Sepic PFC converter are given.

In many applications, such as motor drives and integrating distribute power sources into a grid, there are two or more ac sources or loads. The conventional solution is to use separate modular multilevel converters, which increases cost and volume of system. Thus, a novel nine-arm modular multilevel converter is proposed in this paper, which operates as two conventional modular multilevel converters with three common arms. The proposed converter could save 25% of the number of semiconductors and 50% of the number of buffer inductor relative to two separate MMCs. Then a phase-shifted carrier-based PWM method is presented for the proposed converter. Finally, the simulation results verify the effectiveness of the proposed converter and PWM method. The proposed nine-arm modular multilevel converter is suitable in medium and large power application with two ac inputs or outputs.

Power switching converters have exhibited a wide range of nonlinear behaviors, such as bifurcation and chaos. In this paper, complex bifurcation behaviors in higher order converters with an inductive impedance load are analyzed by studying the Floquet multipliers and the switching modes of the system. A single inner current loop controlled Čuk converter is used as an example to account. The period-1 orbit loses its stability by period-doubling and subcritical Neimark-Sacker bifurcations. We find that border collision behavior occurs between period-2 orbits. And then the period-2 orbit enters an unstable torus orbit via Neimark-Sacker bifurcation. The dynamical behaviors of the system are clearly studied under certain conditions. The mechanism of the coexisting phenomenon from subcritical Neimark-Sacker bifurcation is explained. Finally, the chaotic phenomenon from torus breakdown is firstly detected in this higher order switching converter with an inductive impedance load, its characteristics about phase shift to different initial conditions are investigated as well.

A novel space vector pulse width modulation strategy is proposed to reduce the switching frequencies of transistors in high-power inverters. The inverter is modeled as a switched linear system such that the controllability properties of the inverter can be investigated. After that, the 3-operation modes modulation strategy based on the m-modes controllability is proposed. With the 3-operation modes modulation technique, switching frequencies of the transistors can be reduced by one-third, therefore, the switching losses of the system can be reduced and the overall efficiency of the system can be improved. Finally, the simulation as well as experimental results verified the correctness of the approach.

The main switching block is presented to distinguish the switching behaviors and the degree of the converter's complexity during one switching period. By adopting the coarse-grained symbolic sequence method, the secondary switching block and secondary symbolic sequence are established in terms of main switching block too. Hence the duplicate symbolic sequence is put forward to detect bifurcation types in DC-DC switching converters. A voltage-mode-controlled flyback converter is used as an example to illustrate the applications of the duplicate symbolic sequence.