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Jeffrey D. Russell

dblp:36/2378 · DBLP profile ↗
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5ranked-venue papers
3as first author
0since 2021 · last 1975
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-authorApplied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Electronic design automation · 100%
Theoretical computer science
1 paper
Mathematical optimization · 67% Approximation and online algorithms · 33%

Topics — the 11 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
fault diagnosis
0.031975
System Fault Diagnosis: Closure and Diagnosability with Repair · IEEE Trans. Computers 1975
System Fault Diagnosis: Masking, Exposure, and Diagnosability Without Repair · IEEE Trans. Computers 1975
Structural Factors in the Fault Diagnosis of Combinational Networks · IEEE Trans. Computers 1971
Electronic design automation
hardware verification and test
0.021975
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences" · IEEE Trans. Computers 1975
Structural Factors in the Fault Diagnosis of Combinational Networks · IEEE Trans. Computers 1971
Electronic design automation › hardware verification and test › test generation
boolean difference
0.011975
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences" · IEEE Trans. Computers 1975
Electronic design automation › hardware verification and test
fault detection
0.011975
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences" · IEEE Trans. Computers 1975
Electronic design automation › hardware verification and test › test generation
minimal test set
0.011975
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences" · IEEE Trans. Computers 1975
Electronic design automation › hardware verification and test
test generation
0.011975
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences" · IEEE Trans. Computers 1975
Mathematical optimization
combinatorial optimization
0.011974
An Efficient Algorithm for Finding an Irredundant Set Cover · J. ACM 1974
Mathematical optimization
discrete optimization
0.011974
An Efficient Algorithm for Finding an Irredundant Set Cover · J. ACM 1974
Approximation and online algorithms
set cover
0.011974
An Efficient Algorithm for Finding an Irredundant Set Cover · J. ACM 1974
Electronic design automation › hardware verification and test › fault diagnosis › logic diagnosis
combinational circuit diagnosis
0.011971
Structural Factors in the Fault Diagnosis of Combinational Networks · IEEE Trans. Computers 1971
Electronic design automation › hardware verification and test › design for testability
test point insertion
0.011971
Structural Factors in the Fault Diagnosis of Combinational Networks · IEEE Trans. Computers 1971

Methods — techniques the papers use, named apart from their topics

path sensitization · 0.0heuristic cost reduction · 0.0boolean difference · 0.0graph theory · 0.0
YearPublicationVenuePosition
1975 Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences"
abstract
In the above paper1, the partial Boolean difference is defined and an algorithm for deriving complete minimal test input sequences for single-fault detection is given. In this correspondence, it is shown that the presentation of the algorithm is inadequate with respect to the need for multiple path sensitization. It is further shown that the computational procedure used in footnote 1 does not guarantee minimality of the test set and does not permit the extension to fault location as claimed in the paper.
Gernot Metze, Donald R. Schertz, Kilin To, Gordon Whitney, Charles R. Kime, Jeffrey D. Russell
IEEE Trans. Computers6
1975 System Fault Diagnosis: Masking, Exposure, and Diagnosability Without Repair
abstract
Diagnosability without fault repair of a digital system containing at most t faults is considered. A system-level diagnostic model defined in an earlier paper [1] is employed. The model is to an extent independent of the means used to implement diagnostic procedures, i.e., whether the tests are accomplished via hardware, software, or combinations thereof. Two parameters, the masking and exposure indices, are defined. Conjoined with the previously defined closure index, the parameters fundamentally characterize the capability for executing valid tests in a multiple-fault environment. Necessary and sufficient conditions for a system to be t-fault diagnosable without repair are derived in terms of these parameters. Examples are presented to illustrate the application of the model for systems close to those encountered in actual practice.
Jeffrey D. Russell, Charles R. Kime
IEEE Trans. Computers1
1975 System Fault Diagnosis: Closure and Diagnosability with Repair
abstract
Determination of the detectability and diagnosability of a digital system containing at most t faulty system components is considered. The model employed is to an extent independent of the means used to implement diagnostic procedures, i.e., whether the tests are accomplished via hardware, software, or combinations thereof. A parameter, called the closure index, is defined which characterizes the capability for executing valid tests in the presence of faults. The closure index can be thought of as the size of the smallest potentially undetectable multiple-fault in the system as modeled. On the basis of this parameter, results are presented which permit the determination of t-fault detectability and t-fault diagnosability with repair for the system. Examples are presented to illustrate the application of the model for systems close to those encountered in actual practice.
Jeffrey D. Russell, Charles R. Kime
IEEE Trans. Computers1
1974 An Efficient Algorithm for Finding an Irredundant Set Cover
abstract
The set covering problem is considered and an efficient procedure for finding an irredundant cover is presented. For an m × n cover table, the execution time of the procedure is, in the worst case, proportional to mn . Methods are suggested for obtaining alternate irredundant covers based on an initially obtained irredundant cover. The basic cost-independent algorithm is heuristically extended to consider costs so that a reduced-cost irredundant cover can be obtained. A summary of some computational experience is presented, which indicates that the procedure is fast and applicable to large problems.
Ramachendra P. Batni, Jeffrey D. Russell, Charles R. Kime
J. ACM2
1971 Structural Factors in the Fault Diagnosis of Combinational Networks
abstract
The problem of fault detection and diagnosis of irredundant multiple-output combinational networks is discussed from a purely structural viewpoint, i.e., with the functions of the network components essentially ignored. Two structural models for a network are given in the form of labeled directed graphs. Graph theoretic concepts are introduced, and theorems are developed which give necessary conditions and sufficient conditions for the detectability of faults at particular primary outputs based solely on the structure of the network. Procedures are then presented for obtaining the structural diagnostic resolution for both line and logic module faults. Finally, an application, test point placement for increased network maintainability, is considered.
Jeffrey D. Russell, Charles R. Kime
IEEE Trans. Computers1