The VAX-11/7801 was designed specifically to implement the VAX architecture. As such, it does not support the IEEE standard for floating point arithmetic. A project was undertaken to provide this support by modifying the 11/780 microarchitecture. Our objective was to produce a microengine that would efficiently execute the VAX instruction set, modified to handle VAX floating point instructions in accordance with the IEEE standard. Our methodology was to make minimal changes to the 11/780 hardware, relying primarily on changes to the microcode. This paper describes the modifications required to implement the IEEE standard, examines the various design alternatives available to us, presents measurements of our implementation, and analyzes our results. We also offer some comments on the matter of retrofitting an existing architecture to a new unintended use.