Demo Data from EDBT 2026 / reviewers in the wild / expert
Chung-Jung Chen
dblp:36/4830
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 56% Performance modeling and evaluation · 44% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
circuit simulation |
0.0 | 1 | 1994 | Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation · DAC 1994 |
Performance modeling and evaluation › statistical analysis › sensitivity analysis
transient sensitivity analysis |
0.0 | 1 | 1994 | Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation · DAC 1994 |
Electronic design automation
timing analysis |
0.0 | 1 | 1994 | Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform Eelaxation · DAC 1994 |
Methods — techniques the papers use, named apart from their topics
selective-tracing waveform relaxation · 0.0iterated timing analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1994 | Transient Sensitivity Computation of MOSFET Circuits Using Iterated Timing Analysis and Selective-Tracing Waveform EelaxationabstractNo abstract available. Chung-Jung Chen, Wu-Shiung Feng |
DAC | 1 |