Demo Data from EDBT 2026 / reviewers in the wild / expert
Erl-Huei Lu
dblp:36/6359
· DBLP profile ↗
12ranked-venue papers
5as first author
0since 2021 · last 2009
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4Databases, data management, data science and information retrieval · 4 · 3 first-authorTheory of computation · 4 · 3 first-authorComputer networks · 3 · 2 first-authorHuman-computer interaction and ubiquitous computing · 1Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 78% Hardware accelerators and domain-specific architectures · 22% | |
| Network and information security
3 papers |
Cryptographic primitives and cryptanalysis · 87% Cryptographic protocols and secure computation · 13% |
Topics — the 12 heaviest of 12, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
arithmetic circuit design |
0.1 | 1 | 2005 | Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m) · IEEE Trans. Computers 2005 |
Integrated circuit design › finite field arithmetic
finite field multiplier |
0.1 | 1 | 2005 | Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m) · IEEE Trans. Computers 2005 |
Integrated circuit design › digital circuit design › arithmetic circuit design › modular multiplication
montgomery multiplication |
0.1 | 1 | 2005 | Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m) · IEEE Trans. Computers 2005 |
Hardware accelerators and domain-specific architectures
systolic array |
0.1 | 1 | 2005 | Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m) · IEEE Trans. Computers 2005 |
Cryptographic primitives and cryptanalysis
finite field arithmetic |
0.0 | 2 | 2005 | Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials · IEEE Trans. Computers 2001 Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m) · IEEE Trans. Computers 2005 |
Cryptographic primitives and cryptanalysis › finite field arithmetic
binary field multiplication |
0.0 | 1 | 2001 | Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials · IEEE Trans. Computers 2001 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 2001 | Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials · IEEE Trans. Computers 2001 |
Coding theory › finite fields
finite field arithmetic |
0.0 | 1 | 2001 | Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials · IEEE Trans. Computers 2001 |
Cryptographic protocols and secure computation › key exchange
group key agreement |
0.0 | 1 | 1988 | A conference key distribution system based on the Lagrange interpolating polynomial · INFOCOM 1988 |
Cryptographic protocols and secure computation › key management
key distribution |
0.0 | 1 | 1988 | A conference key distribution system based on the Lagrange interpolating polynomial · INFOCOM 1988 |
Cryptographic protocols and secure computation › key exchange
diffie-hellman key exchange |
0.0 | 1 | 1988 | A conference key distribution system based on the Lagrange interpolating polynomial · INFOCOM 1988 |
Cryptographic primitives and cryptanalysis
public-key cryptography |
0.0 | 1 | 1988 | A conference key distribution system based on the Lagrange interpolating polynomial · INFOCOM 1988 |
Methods — techniques the papers use, named apart from their topics
transformation method · 0.1inner product · 0.1cyclic shifting · 0.1lagrange interpolation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2009 | Improvement of turbo decoding using cross-entropy
Erl-Huei Lu, Yi-Nan Lin, Wei-Wen Hung |
Comput. Commun. | 1 |
| 2006 | Low-Complexity Bit-Parallel Systolic Multipliers over GF(2m)abstractRecently, cryptographic applications based on finite fields have attracted much interest. This paper presents two new algorithms, called time-dependent and time-independent multiplication algorithms over a finite field GF(2m) by employing an interleaved conventional multiplication and a folded technique. The proposed algorithms permit efficient realization of the bit-parallel multiplication using iterative arrays. The results show that our proposed time-dependent and time-independent multipliers save about 38% and 54% space complexity as compared to the traditional multipliers, respectively. Chiou-Yng Lee, Chin-Chin Chen, Yuan-Ho Chen, Erl-Huei Lu |
SMC | 4 |
| 2006 | Modeling the bit-level stochastic correlation for turbo decoding
Yi-Nan Lin, Wei-Wen Hung, Tsan-Jieh Chen, Erl-Huei Lu |
Comput. Commun. | 4 |
| 2005 | Ringed bit-parallel systolic multipliers over a class of fields GF(2m)
Yeun-Renn Ting, Erl-Huei Lu, Ya-Cheng Lu |
Integr. | 2 |
| 2005 | Low-Complexity Bit-Parallel Systolic Montgomery Multipliers for Special Classes of GF(2m)abstractRecently, cryptographic applications based on finite fields have attracted much interest. This paper presents a transformation method to implement low-complexity Montgomery multipliers for all-one polynomials and trinomials. Using this method, we propose a new bit-parallel systolic architecture for computing multiplications over GF(2/sup m/). These new multipliers have a latency m+1 clock cycles and each cell incorporates at most one 2-input AND gate, two 2-input XOR gates, and four 1-bit latches. Moreover, these new multipliers are shown to exhibit significantly lower latency and circuit complexity than the related systolic multipliers and are highly appropriate for VLSI systems because of their regular interconnection pattern, modular structure, and fully inherent parallelism. Chiou-Yng Lee, Jenn-Shyong Horng, I-Chang Jou, Erl-Huei Lu |
IEEE Trans. Computers | 4 |
| 2004 | Low complexity bit-parallel systolic architecture for computing C+AB2 over a class of GF(2m)
Yeun-Renn Ting, Erl-Huei Lu, Jau-Yien Lee |
Integr. | 2 |
| 2001 | A decoding algorithm for triple-error-correcting binary BCH codes
Erl-Huei Lu, Shao-Wei Wu, Yi-Chang Cheng |
Inf. Process. Lett. | 1 |
| 2001 | Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced PolynomialsabstractTwo operations, the cyclic shifting and the inner product, are defined by the properties of irreducible all one polynomials. An effective algorithm is proposed for computing multiplications over a class of fields GF(2/sup m/) using the two operations. Then, two low-complexity bit-parallel systolic multipliers are presented based on the algorithm. The first multiplier is composed of (m+1)/sup 2/ identical cells, each consisting of one 2-input AND gate, one 2-input XOR gate, and three 1-bit latches. The other multiplier comprises of (m+1)/sup 2/ identical cells and mXOR gates. Each cell consists of one 2-input AND gate, one 2-input XOR gate, and four 1-bit latches. Each multiplier exhibits very low latency and propagation delay and is thus very fast. Moreover, the architectures of the two multipliers can be applied in computing multiplications over the class of fields GF(2/sup m/) in which the elements are represented with the root of an irreducible equally spaced polynomial of degree m. Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee |
IEEE Trans. Computers | 2 |
| 1998 | A Modified Version of the Rao-Nam Algebraic-Code Encryption Scheme
Yi-Chang Cheng, Erl-Huei Lu, Shaw Woei Wu |
Inf. Process. Lett. | 2 |
| 1994 | A Complete Decoding Algorithm for Double-Error-Correcting Primitive Binary BCH Codes of Odd m
Erl-Huei Lu, Yi-Chang Chen, Hsiao-Peng Wuu |
Inf. Process. Lett. | 1 |
| 1994 | Corrigendum: A Complete Decoding Algorithm for Double-Error-Correcting Primitive Binary BCH Codes of Odd m
Erl-Huei Lu, Yi-Chang Cheng, Hsiao-Peng Wuu |
Inf. Process. Lett. | 1 |
| 1988 | A conference key distribution system based on the Lagrange interpolating polynomialabstractA conference key distribution system (CKDS) can provide a common secret communication key to a set of M stations. A CKDS based on Lagrange interpolating polynomial is introduced. It is easy to see that breaking this system is equivalent to break the Diffie-Hellman public-key distribution system. This conference key is selected by the conference chairstation and hidden in the Lagrange interpolating polynomial. Recovering this key by each participating station only requires M-1 multiplications and M-2 additions over a finite field GF(P).> Erl-Huei Lu, Wen-Yie Hwang, Lein Harn, Jau-Yien Lee |
INFOCOM | 1 |