Demo Data from EDBT 2026 / reviewers in the wild / expert
Steven Pelley
dblp:36/7934
· DBLP profile ↗
6ranked-venue papers
3as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 2 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-authorDatabases, data management, data science and information retrieval · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
6 papers |
Memory systems · 66% Processor architecture and microarchitecture · 9% Cloud and datacenter computing · 9% | |
| Databases, data mining, and information retrieval
3 papers |
Transaction processing and concurrency control · 70% Distributed and cloud data management · 30% |
Topics — the 13 heaviest of 15, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
non-volatile memory |
0.9 | 4 | 2016 | Delegated persist ordering · MICRO 2016 High-Performance Transactions for Persistent Memories · ASPLOS 2016 Memory persistency · ISCA 2014 |
Memory systems › non-volatile memory
persistent memory |
0.3 | 2 | 2016 | Delegated persist ordering · MICRO 2016 Memory persistency · ISCA 2014 |
Distributed and cloud data management › cloud database
multi-tenant database |
0.2 | 1 | 2016 | The Snowflake Elastic Data Warehouse · SIGMOD Conference 2016 |
Cloud and datacenter computing › cloud data management
cloud data warehouse |
0.2 | 1 | 2016 | The Snowflake Elastic Data Warehouse · SIGMOD Conference 2016 |
Memory systems › non-volatile memory › persistent memory
persistent memory transactions |
0.2 | 1 | 2016 | High-Performance Transactions for Persistent Memories · ASPLOS 2016 |
Memory systems
memory consistency |
0.2 | 1 | 2014 | Memory persistency · ISCA 2014 |
Memory systems › non-volatile memory › persistent memory
persistency model |
0.2 | 1 | 2014 | Memory persistency · ISCA 2014 |
Transaction processing and concurrency control
recovery |
0.2 | 1 | 2013 | Storage Management in the NVRAM Era · Proc. VLDB Endow. 2013 |
Energy-efficient computing
datacenter power management |
0.1 | 1 | 2010 | Power routing: dynamic power provisioning in the data center · ASPLOS 2010 |
Electronic design automation › physical design › routing › VLSI routing
power/ground net routing |
0.1 | 1 | 2010 | Power routing: dynamic power provisioning in the data center · ASPLOS 2010 |
Storage systems
crash consistency |
0.1 | 1 | 2016 | High-Performance Transactions for Persistent Memories · ASPLOS 2016 |
Storage systems
storage reliability |
0.1 | 1 | 2016 | High-Performance Transactions for Persistent Memories · ASPLOS 2016 |
Energy-efficient computing › power management
power capping |
0.0 | 1 | 2010 | Power routing: dynamic power provisioning in the data center · ASPLOS 2010 |
Methods — techniques the papers use, named apart from their topics
write ordering constraints · 0.5commit deferral · 0.5simulation · 0.2power oversubscription · 0.1fault tolerance reserve · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | High-Performance Transactions for Persistent MemoriesabstractEmerging non-volatile memory (NVRAM) technologies offer the durability of disk with the byte-addressability of DRAM. These devices will allow software to access persistent data structures directly in NVRAM using processor loads and stores, however, ensuring consistency of persistent data across power failures and crashes is difficult. Atomic, durable transactions are a widely used abstraction to enforce such consistency. Implementing transactions on NVRAM requires the ability to constrain the order of NVRAM writes, for example, to ensure that a transaction's log record is complete before it is marked committed. Since NVRAM write latencies are expected to be high, minimizing these ordering constraints is critical for achieving high performance. Recent work has proposed programming interfaces to express NVRAM write ordering constraints to hardware so that NVRAM writes may be coalesced and reordered while preserving necessary constraints. Unfortunately, a straightforward implementation of transactions under these interfaces imposes unnecessary constraints. We show how to remove these dependencies through a variety of techniques, notably, deferring commit until after locks are released. We present a comprehensive analysis contrasting two transaction designs across three NVRAM programming interfaces, demonstrating up to 2.5x speedup. Aasheesh Kolli, Steven Pelley, Ali G. Saidi, Peter M. Chen, Thomas F. Wenisch |
ASPLOS | 2 |
| 2016 | Delegated persist orderingabstractSystems featuring a load-store interface to persistent memory (PM) are expected soon, making in-memory persistent data structures feasible. Ensuring persistent data structure recoverability requires constraints on the order PM writes become persistent. But, current memory systems reorder writes, providing no such guarantees. To complement their upcoming 3D XPoint memory, Intel has announced new instructions to enable programmer control of data persistence. We describe the semantics implied by these instructions, an ordering model we call synchronous ordering. Synchronous ordering (SO) enforces order by stalling execution when PM write ordering is required, exposing PM write latency on the execution critical path. It incurs an average slowdown of 7.21x over volatile execution without ordering in PM-write-intensive benchmarks. SO tightly couples enforcing order and flushing writes to PM, but this tight coupling is unneeded in many recoverable software systems. Instead, we propose delegated ordering, wherein ordering requirements are communicated explicitly to the PM controller, fully decoupling PM write ordering from volatile execution and cache management. We demonstrate that delegated ordering can bring performance within 1.93x of volatile execution, improving over SO by 3.73x. Aasheesh Kolli, Jeff Rosen, Stephan Diestelhorst, Ali G. Saidi, Steven Pelley, Sihang Liu 0001, Peter M. Chen, Thomas F. Wenisch |
MICRO | 5 |
| 2016 | The Snowflake Elastic Data WarehouseabstractWe live in the golden age of distributed computing. Public cloud platforms now offer virtually unlimited compute and storage resources on demand. At the same time, the Software-as-a-Service (SaaS) model brings enterprise-class systems to users who previously could not afford such systems due to their cost and complexity. Alas, traditional data warehousing systems are struggling to fit into this new environment. For one thing, they have been designed for fixed resources and are thus unable to leverage the cloud's elasticity. For another thing, their dependence on complex ETL pipelines and physical tuning is at odds with the flexibility and freshness requirements of the cloud's new types of semi-structured data and rapidly evolving workloads. We decided a fundamental redesign was in order. Our mission was to build an enterprise-ready data warehousing solution for the cloud. The result is the Snowflake Elastic Data Warehouse, or "Snowflake" for short. Snowflake is a multi-tenant, transactional, secure, highly scalable and elastic system with full SQL support and built-in extensions for semi-structured and schema-less data. The system is offered as a pay-as-you-go service in the Amazon cloud. Users upload their data to the cloud and can immediately manage and query it using familiar tools and interfaces. Implementation began in late 2012 and Snowflake has been generally available since June 2015. Today, Snowflake is used in production by a growing number of small and large organizations alike. The system runs several million queries per day over multiple petabytes of data. Benoît Dageville, Thierry Cruanes, Marcin Zukowski, Vadim Antonov, Artin Avanes, Jon Bock, Jonathan Claybaugh, Daniel Engovatov, Martin Hentschel 0001, Jiansheng Huang, Allison W. Lee, Ashish Motivala, Abdul Q. Munir, Steven Pelley, Peter Povinec, Greg Rahn, Spyridon Triantafyllis, Philipp Unterbrunner |
SIGMOD Conference | 14 |
| 2014 | Memory persistencyabstractEmerging nonvolatile memory technologies (NVRAM) promise the performance of DRAM with the persistence of disk. However, constraining NVRAM write order, necessary to ensure recovery correctness, limits NVRAM write concurrency and degrades throughput. We require new memory interfaces to minimally describe write constraints and allow high performance and high concurrency data structures. These goals strongly resemble memory consistency. Whereas memory consistency concerns the order that memory operations are observed between numerous processors, persistent memory systems must constrain the order that writes occur with respect to failure. We introduce memory persistency, a new approach to designing persistent memory interfaces, building on memory consistency. Similar to memory consistency, memory persistency models may be relaxed to improve performance. We describe the design space of memory persistency and desirable features that such a memory system requires. Finally, we introduce several memory persistency models and evaluate their ability to expose NVRAM write concurrency using two implementations of a persistent queue. Our results show that relaxed persistency models accelerate system throughput 30-fold by reducing NVRAM write constraints. Steven Pelley, Peter M. Chen, Thomas F. Wenisch |
ISCA | 1 |
| 2013 | Storage Management in the NVRAM EraabstractEmerging nonvolatile memory technologies (NVRAM) offer an alternative to disk that is persistent, provides read latency similar to DRAM, and is byte-addressable. Such NVRAMs could revolutionize online transaction processing (OLTP), which today must employ sophisticated optimizations with substantial software overheads to overcome the long latency and poor random access performance of disk. Nevertheless, many candidate NVRAM technologies exhibit their own limitations, such as greater-than-DRAM latency, particularly for writes. In this paper, we reconsider OLTP durability management to optimize recovery performance and forward-processing throughput for emerging NVRAMs. First, we demonstrate that using NVRAM as a drop-in replacement for disk allows near-instantaneous recovery, but software complexity necessary for disk (i.e., Write Ahead Logging/ARIES) limits transaction throughput. Next, we consider the possibility of removing software-managed DRAM buffering. Finally, we measure the cost of ordering writes to NVRAM, which is vital for correct recovery. We consider three recovery mechanisms: NVRAM Disk-Replacement, In-Place Updates (transactions persist data in-place), and NVRAM Group Commit (transactions commit/persist atomically in batches). Whereas In-Place Updates offers the simplest design, it introduces persist synchronizations at every page update. NVRAM Group Commit minimizes persist synchronization, offering up to a 50% throughput improvement for large synchronous persist latencies. Steven Pelley, Thomas F. Wenisch, Brian T. Gold, Bill Bridge |
Proc. VLDB Endow. | 1 |
| 2010 | Power routing: dynamic power provisioning in the data centerabstractData center power infrastructure incurs massive capital costs, which typically exceed energy costs over the life of the facility. To squeeze maximum value from the infrastructure, researchers have proposed over-subscribing power circuits, relying on the observation that peak loads are rare. To ensure availability, these proposals employ power capping, which throttles server performance during utilization spikes to enforce safe power budgets. However, because budgets must be enforced locally -- at each power distribution unit (PDU) -- local utilization spikes may force throttling even when power delivery capacity is available elsewhere. Moreover, the need to maintain reserve capacity for fault tolerance on power delivery paths magnifies the impact of utilization spikes. Steven Pelley, David Meisner, Pooya Zandevakili, Thomas F. Wenisch, Jack Underwood |
ASPLOS | 1 |