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Quan Nguyen-Gia

dblp:364/6672 · DBLP profile ↗
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1ranked-venue papers
1as first author
1since 2021 · last 2024
0000-0002-8816-5023ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
memory circuit design
0.812024
Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Integrated circuit design › semiconductor device modeling
threshold voltage modeling
0.812024
Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.212024
Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024

Methods — techniques the papers use, named apart from their topics

device simulation · 0.8
YearPublicationVenuePosition
2024 Modeling of Threshold Voltage Shift by Neighboring Transistors for Macaroni Channel MOSFETs in Series
abstract
In this article, we introduce a model to calculate the threshold voltage of the victim transistor attacked by the neighbor transistors with a macaroni structure. Using this model, we investigate the shift of the victim threshold voltage to get insight into the interference effect of NAND cells in a string with different structural parameters and biases. The fitting between simulations and calculations confirms the validity of these models.
Quan Nguyen-Gia, Hyungcheol Shin
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1