Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.

Alleyn Murphy

dblp:367/9492 · DBLP profile ↗
← Back
2ranked-venue papers
0as first author
2since 2021 · last 2026
0009-0004-1442-5867ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 44% Parallel and multicore computing · 44% Memory systems · 13%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › real-time scheduling › multicore scheduling
cache-aware scheduling
0.712023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023
Parallel and multicore computing › task scheduling › task graph scheduling
fork-join scheduling
0.712023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023
Embedded and real-time systems
real-time scheduling
0.712023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023
Parallel and multicore computing › parallel scheduling
thread scheduling
0.712023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023
Memory systems
cache
0.212023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023
Memory systems › cache management
cache sharing
0.212023
Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing · RTSS 2023

Methods — techniques the papers use, named apart from their topics

simulation · 0.7approximation algorithm · 0.7
YearPublicationVenuePosition
2026 Near-Optimal Cache Sharing through Co-Located Parallel Scheduling of Threads
abstract
For hard-real time systems, cache memory increases execution time variability, increasing the complexity of timing analysis. As such, cache memory is often treated exclusively as a detractor to schedulability. Cache-aware co-located scheduling aims at improving schedulability by carefully scheduling threads to share cached values. Cache sharing between threads potentially reduces task execution times and increases schedulability with fewer resources. Antithetically, co-located scheduling may reduce parallelism, decreasing efficiency. Thus, identifying the optimal set of threads to co-locate that minimizes the resources required while ensuring timing constraints is a complex challenge. This work establishes optimal co-location as NP-Hard in the strong sense. It offers an approximation method for the co-located scheduling of Fork-Join tasks named 3-parm-hd . The approximation has a 3-factor guarantee and a resource augmentation bound of 3. The simulated evaluation shows 3-parm-hd increases schedulability compared to an optimal intractable algorithm (without co-location) scheduling 28% more tasks with 30% fewer cores. Simulated results show 3-parm-hd outperforms a 2-factor approximation for traditional makespan, scheduling 45 % more tasks with 41% fewer cores. An experimental RISC-V evaluation running on a QEMU platform confirms the benefits of 3-parm-hd , scheduling and executing tasks deemed unschedulable by a 2-factor makespan approximation without co-location.
Corey Tessler, Prashant Modekurthy, Nathan Fisher, Abusayeed Saifullah, Alleyn Murphy
ACM Trans. Embed. Comput. Syst.5
2023 Co-Located Parallel Scheduling of Threads to Optimize Cache Sharing
abstract
For hard-real time systems, cache memory increases execution time variability, increasing the complexity of timing analysis. As such, cache memory is often treated exclusively as a detractor to schedulability. Cache-aware co-located scheduling aims to improve schedulability by carefully scheduling threads to share cached values. Cache sharing between threads potentially reduces task execution times and increases schedulability with fewer resources. Antithetically, co-located scheduling may reduce parallelism, decreasing efficiency. Thus, identifying the optimal set of threads to co-locate that minimizes the resources required while ensuring timing constraints is a complex challenge. This work establishes optimal co-location as NP-Hard in the strong sense. It offers an approximation method for the co-located scheduling of Fork-Join tasks named 3-PARM-HD. The approximation has a 3-factor guarantee and a resource augmentation bound of 3. The simulated evaluation shows 3-PARM-HD increases schedulability compared to an optimal intractable algorithm (without co-location) scheduling 28% more tasks with 30% fewer cores. Simulated results show 3-PARM-HD outperforms a 2-factor approximation for traditional makespan, scheduling 39% more tasks with 44% fewer cores. An experimental RISC-V evaluation running on a QEMU platform confirms the benefits of 3-PARM-HD, scheduling and executing tasks deemed unschedulable by a 2-factor makespan approximation without co-location.
Corey Tessler, Prashant Modekurthy, Nathan Fisher, Abusayeed Saifullah, Alleyn Murphy
RTSS5