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Jinhua Wang 0007

dblp:37/1279-7 · DBLP profile ↗
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3ranked-venue papers
1as first author
3since 2021 · last 2026
0000-0001-6770-1248ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Computer networks · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Wireless sensing and localization · 57% Internet of things and sensor networks · 19% Cellular and mobile networks · 19%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Internet of things and sensor networks
backscatter communication
0.812024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024
Wireless sensing and localization
backscatter localization
0.812024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024
Wireless sensing and localization › radar signal processing
FMCW radar
0.812024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024
Cellular and mobile networks
integrated sensing and communication
0.812024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024
Wireless sensing and localization
radar sensing
0.812024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024
Physical-layer communications
modulation
0.212024
Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags · SIGCOMM 2024

Methods — techniques the papers use, named apart from their topics

passive differential circuitry · 0.8chirp-slope-shift-keying · 0.8FMCW radar · 0.8
YearPublicationVenuePosition
2026 A 97.63 fJ/conv-step 3 GSa/s 2-Way Time-Interleaved (TI) 3-Bit Flash ADC for Analog In-Memory Computing (IMC) Deep Learning (DL) Accelerators in 28-nm CMOS
Jinhua Wang 0007, Adam H. Slater, Travis N. Blalock, Steven M. Bowers
ISCAS1
2025 A Compact, Power-Efficient, and On-the-Fly I2C-to-SPI Converter for Distributed E-Textile Systems
abstract
This paper presents a 0.36-mm2I2C-to-SPI converter chip designed for electronic textile (E-textile) applications, featuring an on-the-fly conversion scheme that eliminates the need for on-chip data buffers and internal clock generation. By leveraging the synchronous nature of both I2C and SPI protocols, the proposed design forwards each incoming I2C data bit, SDA (Serial Data Line) directly to the SPI output using the I2C serial clock line (SCL), thereby reducing both area and power consumption. Two versions of the chip are proposed: a ‘full’ die and a ‘compact’ die. The converter enables seamless integration into distributed in-textile architectures by minimizing silicon overhead. The ‘full’ die implementation achieves a$7.33\times $area reduction compared to commercially available I2C-to-SPI converters, while the ‘compact’ version further reduces the footprint by$14.73\times $through the use of a small corner seal-ring and a linear pad ring layout. Measurement results confirm robust operation at ultra-fast I2C frequency (5 MHz), consuming only 0.379 mW for the ‘full’ die and 0.333 mW for the ‘compact’ variant. At standard I2C speeds (400 kHz), the converter demonstrates a$48\times $improvement (‘full’ die) in power efficiency over commercial off-the-shelf (COTS) solutions, making it an effective and unobtrusive solution for next-generation E-textile systems.
Omar Faruqe, Zhenghong Chen, Suprio Bhattacharya, Fahim Foysal, Samit Hasan, Jinhua Wang 0007, Daniel S. Truesdell, Benton H. Calhoun
IEEE Trans. Circuits Syst. I Regul. Pap.6
2024 Integrated Two-way Radar Backscatter Communication and Sensing with Low-power IoT Tags
abstract
Integrated Sensing and Communication (ISAC) represents an innovative paradigm for enhancing spectrum and hardware utilization for both sensing and communication. A specific type of ISAC, radar backscatter communication, involves low-power nodes embedding data onto radar signal reflections rather than generating new signals. However, existing radar backscatter techniques only facilitate uplink communication from the tag to the radar, neglecting downlink communication. This paper introduces BiScatter, an integrated radar backscatter communication and sensing system that enables simultaneous uplink and downlink backscatter communication, radar sensing, and backscatter localization. This is achieved through the design of chirp-slope-shift-keying modulation on top of Frequency Modulated Continuous Wave (FMCW) radars, complemented by passive differential circuitry at the backscatter tags for low-power decoding. BiScatter also presents a packet structure compatible with off-the-shelf radars that offer accurate data processing and synchronization between radar and tag. We prototype this backscatter network in both 9GHz and 24GHz, demonstrating its capability to extend across different frequency bands. Our evaluations demonstrate that BiScatter supports two-way backscatter communication with BER lower than 10-3 up to 7m range and centimeter-level tag localization accuracy on top of off-the-shelf FMCW radars. The presented approach significantly augments the versatility and efficiency of ISAC for low-power devices.
Ryu Okubo, Luke Jacobs, Jinhua Wang 0007, Steven M. Bowers, Elahe Soltanaghai
SIGCOMM3