EDBT 2026 Demo / reviewers in the wild / expert
Cesare Tinelli
dblp:37/4921
· DBLP profile ↗
108ranked-venue papers
10as first author
39since 2021 · last 2026
0000-0002-6726-775XORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Theory of computation · 82 · 7 first-author · 25 since 2021Software engineering, systems software and programming languages · 55 · 1 first-author · 25 since 2021Artificial intelligence and machine learning · 36 · 6 first-author · 13 since 2021Security and privacy · 2 · 2 since 2021Applied, interdisciplinary, general and emerging computing · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | The Cooperating Proof Calculus: Comprehensive Proofs for an SMT SolverabstractAbstract We present the Cooperating Proof Calculus (CPC), an evolving set of proof rules encompassing all inferences used in the mainstream theories of the SMT solver cvc5. CPC consists of 585 proof rules, which are formalized in 8025 lines of definitions in the logical framework Eunoia. Eunoia proofs are independently checkable by the proof checker Ethos. This paper gives a detailed summary of CPC, surveying its proof rules over its major components. Having instrumented cvc5 to generate CPC proofs in Eunoia, we show that the solver is capable of generating fine-grained CPC proofs, with no proof holes, for all benchmarks in the SMT library except those in logics with floating-point arithmetic, which are currently not supported. This results in more than 900 million proof steps using 427 unique proof rules. We also discuss ongoing work in the proof assistants Lean and Isabelle to verify the correctness of CPC. Andrew Reynolds 0001, Hans-Jörg Schurr, Haniel Barbosa, Ofec Israel, Jibiana Jakpor, Hanna Lachnitt, Abdalrhman Mohamed, Aina Niemetz, Mathias Preiner, Yoni Zohar, Robert B. Jones, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 13 |
| 2026 | Formalization of a Proof Calculus for Incremental Linearization for Satisfiability Modulo Nonlinear Arithmetic and Transcendental FunctionsabstractDetermining the satisfiability of formulas involving nonlinear real arithmetic and transcendental functions is necessary in many applications, such as formally verifying dynamic systems. Doing this automatically generally requires costly and intricate methods, which limits their applicability. In the context of SMT solving, Incremental Linearization was introduced recently to facilitate reasoning on this domain, via an incomplete but easy to implement and highly effective approach. The approach, based on abstraction-refinement via an incremental axiomatization of the nonlinear and transcendental operators, is currently implemented in the SMT solvers MathSAT and cvc5. The cvc5 implementation is also proof-producing. This paper presents two contributions: a formalization in the Lean proof assistant of the proof calculus employed by cvc5, and an extension of the lean-smt plugin to reconstruct the proofs produced by cvc5 using this proof calculus. These contributions ensure the soundness of the proof calculus, making the underlying algorithm more trustworthy. Moreover, they allow users to check cvc5 results obtained via incremental linearization, as well as improve Lean’s automation for problems in nonlinear arithmetic. We discuss how we modeled the rules in the proof assistant and the challenges encountered while formalizing them, as well as the issues in reconstructing proofs involving these rules in Lean, and how we solved them. Tomaz Mascarenhas, Harun Khan 0001, Abdalrhman Mohamed, Andrew Reynolds 0001, Haniel Barbosa, Clark W. Barrett, Cesare Tinelli |
CPP | 7 |
| 2026 | Checking Regular Expressions in Cvc5 ProofsabstractAbstract cvc5 is a state-of-the-art proof-producing SMT solver, capable of solving formulas over a myriad of theories, including Unicode strings. Matching regular expressions against concrete strings is done numerous times during the solving process, and forms a bottleneck in proof-checking for unsatisfiable formulas. We describe three approaches for checking regular expressions in the Eunoia proof-checking framework, and evaluate them on proofs produced by cvc5. Ofec Israel, Yoni Zohar, Andrew Reynolds 0001, S. Hitarth, Bruno Dutertre, Clark W. Barrett, Cesare Tinelli |
IJCAR (1) | 7 |
| 2026 | Ethos: A Fast Proof Checker for the Eunoia Logical FrameworkabstractAbstract SMT solvers are used in many safety-critical applications. To provide evidence of the correctness of their answers, some SMT solvers generate externally checkable proof certificates. We present a high-performance checker for SMT proof certificates called Ethos . In contrast with other dedicated SMT proof checkers, Ethos does not implement a fixed proof calculus. Instead, it allows users to specify their own calculus in the declarative language Eunoia, which extends the familiar SMT-LIB syntax to make that easy and convenient. We give a short overview of Eunoia and then focus on Ethos itself. We describe multiple optimization and implementation details which make Ethos fast and practical. We also evaluate Ethos on proofs generated by cvc5, showing that the flexibility of Ethos allows us to efficiently check fine-grained proofs, containing no proof holes, over all SMT-LIB logics without floating point arithmetic. Andrew Reynolds 0001, Hans-Jörg Schurr, Mallku Soldevila, Haniel Barbosa, Clark W. Barrett, Cesare Tinelli |
IJCAR (1) | 6 |
| 2026 | Enumerating Choice Terms in Model-Based Quantifier InstantiationabstractSatisfiability modulo theories (SMT) solvers are widely used for determining the satisfiability of logical formulas with respect to background theories. SMT solvers are traditionally based on first-order logic, but some also support higher-order logic. Recently, Kondylidou et al. introduced model-based quantifier instantiation with fast enumeration (MBQI-Enum), a quantifier instantiation strategy that works for both logics. A weakness of MBQI-Enum is that it does not find refutations when Hilbert choice terms are necessary. In this work, we present an extension of MBQI-Enum that enables it to reason effectively about Hilbert’s choice operator. The extended strategy substantially increases the success rate of the SMT solver cvc5 on higher-order benchmarks. Lydia Kondylidou, Andrew Reynolds 0001, Jasmin Blanchette, Cesare Tinelli |
TACAS (1) | 4 |
| 2026 | Exploring the SMT-LIB Benchmark LibraryabstractThe SMT-LIB benchmark collection is a large set of problems for SMT solvers. It has been continuously maintained and expanded since its creation in the early 2000s by the SMT-LIB initiative. It has been used since 2005 by the annual SMT solver competition to compare the performance of SMT solvers, and by researchers to study novel solving techniques. Effective use of the collection often requires access to benchmark metadata (e.g., date, source, satisfiability status, theory symbol count, and so on). Furthermore, this metadata and the past competition results contain a wealth of historical information about the development of SMT solving. In this paper, we report on our efforts to collect and curate all metadata from the SMT-LIB benchmarks together with the results of all past SMT-COMP competitions in a single SQLite database. We also present tools to explore this database and extract relevant insights. Since APIs for SQLite databases are available for all major programming languages, the database makes it easy to add features using SMT benchmark metadata to SMT development tools. To illustrate the structure of the collected data we perform multiple case studies. In particular, we present a comparison of SMT solvers that is independent of the changing hardware and benchmarks used by the competition. The database is released annually on Zenodo, and serves as an archive of the state of SMT-LIB and, by extension, of the state of the art in SMT. Hans-Jörg Schurr, François Bobot, Mathias Preiner, Aina Niemetz, Clark W. Barrett, Pascal Fontaine, Cesare Tinelli |
TACAS (1) | 7 |
| 2025 | lean-smt: An SMT Tactic for Discharging Proof Goals in LeanabstractAbstract Lean is an increasingly popular proof assistant based on dependent type theory. Despite its success, it still lacks important automation features present in more seasoned proof assistants, such as the Sledgehammer tactic in Isabelle/HOL. A key aspect of Sledgehammer is the use of proof-producing SMT solvers to prove a translated proof goal and the reconstruction of the resulting proof into valid justifications for the original goal. We present lean-smt , a tactic providing this functionality in Lean. We detail how the tactic converts Lean goals into SMT problems and, more importantly, how it reconstructs SMT proofs into native Lean proofs. We evaluate the tactic on established benchmarks used to evaluate Sledgehammer’s SMT integration, with promising results. We also evaluate lean-smt as a standalone proof checker for proofs of SMT-LIB problems. We show that lean-smt offers a smaller trusted core without sacrificing too much performance. Abdalrhman Mohamed, Tomaz Mascarenhas, Harun Khan 0001, Haniel Barbosa, Andrew Reynolds 0001, Yicheng Qian, Cesare Tinelli, Clark W. Barrett |
CAV (3) | 7 |
| 2025 | Towards SMT Solver Stability via Input Normalization
Daneshvar Amrollahi, Mathias Preiner, Aina Niemetz, Andrew Reynolds 0001, Moses Charikar, Cesare Tinelli, Clark W. Barrett |
FMCAD | 6 |
| 2025 | Solving Set Constraints with Comprehensions and Bounded Quantifiers
Mudathir Mohamed, Nick Feng, Andrew Reynolds 0001, Cesare Tinelli, Clark W. Barrett, Marsha Chechik |
FMCAD | 4 |
| 2025 | Improving the SMT Proof Reconstruction Pipeline in Isabelle/HOLabstractSledgehammer is a tool that increases the level of automation in the Isabelle/HOL proof assistant by asking external automatic theorem provers (ATPs), including SMT solvers, to prove the current goal. When the external ATP succeeds it must provide enough evidence that the goal holds for Isabelle to be able to reprove it internally based on that evidence. In particular, Isabelle can do this by replaying fine-grained proof certificates from proof-producing SMT solvers as long as they are expressed in the Alethe format, which until now was supported only by the veriT SMT solver. We report on our experience adding proof reconstruction support for the cvc5 SMT solver in Isabelle by extending cvc5 to produce proofs in the Alethe format and then adapting Isabelle to reconstruct those proofs. We discuss several difficulties and pitfalls we encountered and describe a set of tools and techniques we developed to improve the process. A notable outcome of this effort is that Isabelle can now be used as an independent proof checker for SMT problems written in the SMT-LIB standard. We evaluate cvc5’s integration on a set of SMT-LIB benchmarks originating from Isabelle as well as on a set of Isabelle proofs. Our results confirm that this integration complements and improves Sledgehammer’s capabilities. Hanna Lachnitt, Mathias Fleury, Haniel Barbosa, Jibiana Jakpor, Bruno Andreotti, Andrew Reynolds 0001, Hans-Jörg Schurr, Clark W. Barrett, Cesare Tinelli |
ITP | 9 |
| 2025 | Bit-Precise Reasoning with Parametric Bit-Vectors
Zvika Berger, Yoni Zohar, Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
SAT | 7 |
| 2025 | Saecred: A State-Aware, Over-the-Air Protocol Testing Approach for Discovering Parsing Bugs in SAE Handshake Implementations of COTS Wi-Fi Access PointsabstractWPA3-Personal introduced the stateful Simultane-ous Authentication of Equals (SAE) handshake protocol to achieve forward secrecy and resistance to passphrase guessing attacks during Wi-Fi connection bootstrapping, guarantees that are lacking in WPA2-Personal. However, the initial design of WPA3-Personal with SAE was susceptible to connection downgrade and denial-of-service (DoS) attacks. The current, enhanced version introduces mechanisms to mitigate these vulnerabilities. Enabling these security-enhancing mechanisms, however, results in a variable-structured, context-sensitive packet format that can be challenging to parse and interpret correctly. Misparsing SAE handshake packets can negatively impact Wi-Fi protocol security. To uncover SAE handshake packet misparsing in commercial-off-the-shelf (COTS) Wi-Fi access points (APs), we present Saecred,a packet-structure-guided, SAE-state-aware black-box fuzzer. Saecredreduces the underlying problem of misparsing discovery to a two-dimensional search problem, where the dimensions are the packet structure and the underlying SAE protocol state. It solves this search problem by combining Iterative Deepening Search (IDS) with a context-sensitive grammar-based fuzzing approach, where the latter relies on a Syntax-Guided Synthesis (SyGuS) solver. Saecred'seffectiveness is demonstrated by evaluating it on 6 COTS APs and the widely used open-source hostapd. Our evaluation discovered several instances of 4 classes of bugs. Bugs in two of these classes violate the two fundamental guarantees SAE expects to achieve (i.e., resistance to downgrade and DoS attacks). We reported our findings to the relevant stakeholders, which resulted in patches and security advisories. Muhammad Daniyal Pirwani Dar, Robert Lorch, Aliakbar Sadeghi, Vincenzo Sorcigli, Héloïse Gollier, Cesare Tinelli, Mathy Vanhoef, Omar Chowdhury |
SP | 6 |
| 2024 | The MoXI Model Exchange Tool SuiteabstractAbstract We release the first tool suite implementingMoXI(Model eXchange Interlingua), an intermediate language for symbolic model checking designed to be an international research-community standard and developed by a widespread collaboration under a National Science Foundation (NSF) CISE Community Research Infrastructure initiative. Although we focus here on hardware verification, theMoXIlanguage is useful for software model checking and verification of infinite-state systems in general.MoXIbuilds on elements of SMT-LIB 2; it is easy to add new theories and operators. Our contributions include: (1) introducing the first tool suite of automated translators into and out of the new model-checking intermediate language; (2) composing an initial example benchmark set enabling the model-checking research community to build future translations; (3) compiling details for utilizing, extending, and improving upon our tool suite, including usage characteristics and initial performance data. Experimental evaluations demonstrate that compiling SMV-language models throughMoXIto perform symbolic model checking with the tools from the last Hardware Model Checking Competition performs competitively with model checking directly vianuXmv. Christopher Johannsen, Karthik Nukala, Rohit Dureja, Ahmed Irfan, Natarajan Shankar, Cesare Tinelli, Moshe Y. Vardi, Kristin Y. Rozier |
CAV (1) | 6 |
| 2024 | Satisfiability Modulo Theories: A Beginner's TutorialabstractAbstract Great minds have long dreamed of creating machines that can function as general-purpose problem solvers. Satisfiability modulo theories (SMT) has emerged as one pragmatic realization of this dream, providing significant expressive power and automation. This tutorial is a beginner’s guide to SMT. It includes an overview of SMT and its formal foundations, a catalog of the main theories used in SMT solvers, and illustrations of how to obtain models and proofs. Throughout the tutorial, examples and exercises are provided as hands-on activities for the reader. They can be run using either Python or the SMT-LIB language, using either the cvc5 or the Z3 SMT solver. Clark W. Barrett, Cesare Tinelli, Haniel Barbosa, Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Yoni Zohar |
FM (2) | 2 |
| 2024 | Generalized Optimization Modulo TheoriesabstractAbstract Optimization Modulo Theories (OMT) has emerged as an important extension of the highly successful Satisfiability Modulo Theories (SMT) paradigm. The OMT problem requires solving an SMT problem with the restriction that the solution must be optimal with respect to a given objective function. We introduce a generalization of the OMT problem where, in particular, objective functions can range over partially ordered sets. We provide a formalization of and an abstract calculus for the Generalized OMT problem and prove their key correctness properties. Generalized OMT extends previous work on OMT in several ways. First, in contrast to many current OMT solvers, our calculus is theory-agnostic, enabling the optimization of queries over any theories or combinations thereof. Second, our formalization unifies both single- and multi-objective optimization problems, allowing us to study them both in a single framework and facilitating the use of objective functions that are not supported by existing OMT approaches. Finally, our calculus is sufficiently general to fully capture a wide variety of current OMT approaches (each of which can be realized as a specific strategy for rule application in the calculus) and to support the exploration of new search strategies. Much like the original abstract DPLL(T) calculus for SMT, our Generalized OMT calculus is designed to establish a theoretical foundation for understanding and research and to serve as a framework for studying variations of and extensions to existing OMT methodologies. Nestan Tsiskaridze, Clark W. Barrett, Cesare Tinelli |
IJCAR (1) | 3 |
| 2024 | Verifying SQL queries using theories of tables and relationsabstractWe present a number of first- and second-order extensions to SMT theories specifically aimed at representing and analyzing SQL queries with join, projection, and selection op- erations. We support reasoning about SQL queries with either bag or set semantics for database tables. We provide the former via an extension of a theory of finite bags and the latter via an extension of the theory of finite relations. Furthermore, we add the ability to reason about tables with null values by introducing a theory of nullable sorts based on an extension of the theory of algebraic datatypes. We implemented solvers for these theories in the SMT solver cvc5 and evaluated them on a set of benchmarks derived from public sets of SQL equivalence problems. Mudathir Mohamed, Andrew Reynolds 0001, Cesare Tinelli, Clark W. Barrett |
LPAR | 3 |
| 2024 | A Comprehensive, Automated Security Analysis of the Uptane Automotive Over-the-Air Update FrameworkabstractWe present our experience of formally verifying the desired security properties of the Uptane over-the-air (OTA) software update framework against a set of applicable threat models. Uptane is gaining traction in the automobile industry and is widely considered the next de-facto standard for OTA automobile software updates. The security of Uptane is of utmost importance because modern automobiles rely on software for their safety-critical functionalities and, especially, require OTA software updates to add new safety features or patch bugs in existing ones. Design flaws in Uptane can either violate the integrity of the updates to be installed or prevent vehicles from installing new updates, both of which can cause severe safety issues. Previous approaches to protocol verification either fail to capture the necessary features of Uptane or suffer from termination issues due to Uptane’s complexity. A key component of our approach lies in the eager combination of an infinite-state model checker and a cryptographic protocol verifier, where (in contrast to prior lazy approaches) we are able to eliminate a key manual step in the workflow while enabling reasoning over more fine-grained message structures. In addition, our approach utilizes two proven soundness- and completeness-preserving state-space-reduction optimizations for computational tractability, as well as a meta-level analysis technique that makes it feasible to reason over Uptane’s set of optional protocol features. Our approach is able to discover six new vulnerabilities while rediscovering all five known ones. While there have been previous analyses of Uptane’s security properties, they either missed design flaws identified by our approach or suffered from coverage and termination issues. The Uptane standards body has positively acknowledged our findings and has suggested updates to the protocol specification documents to address them. Robert Lorch, Daniel Larraz, Cesare Tinelli, Omar Chowdhury |
RAID | 3 |
| 2024 | Scalable Proof Production and Checking in SMT (Invited Talk)
Cesare Tinelli |
SAT | 1 |
| 2024 | MoXI: An Intermediate Language for Symbolic Model Checking
Kristin Y. Rozier, Rohit Dureja, Ahmed Irfan, Christopher Johannsen, Karthik Nukala, Natarajan Shankar, Cesare Tinelli, Moshe Y. Vardi |
SPIN | 7 |
| 2024 | IsaRare: Automatic Verification of SMT Rewrites in Isabelle/HOLabstractAbstract Satisfiability modulo theories (SMT) solvers are widely used to ensure the correctness of safety- and security-critical applications. Therefore, being able to trust a solver’s results is crucial. One way to increase trust is to generate independently checkable proof certificates, which record the reasoning steps done by the solver. A key challenge with this approach is that it is difficult to efficiently and accurately produce proofs for reasoning steps involving term rewriting rules. Previous work showed how a domain-specific language, Rare, can be used to capture rewriting rules for the purposes of proof production. However, in that work, the Rare rules had to be trusted, as the correctness of the rules themselves was not checked by the proof checker. In this paper, we present IsaRare, a tool that can automatically translate Rare rules into Isabelle/HOL lemmas. The soundness of the rules can then be verified by proving the lemmas. Because an incorrect rule can put the entire soundness of a proof system in jeopardy, our solution closes an important gap in the trustworthiness of SMT proof certificates. The same tool also provides a necessary component for enabling full proof reconstruction of SMT proof certificates in Isabelle/HOL. We evaluate our approach by verifying an extensive set of rewrite rules used by the cvc5 SMT solver. Hanna Lachnitt, Mathias Fleury, Leni Aniva, Andrew Reynolds 0001, Haniel Barbosa, Andres Nötzli, Clark W. Barrett, Cesare Tinelli |
TACAS (1) | 8 |
| 2023 | Satisfiability Modulo Finite FieldsabstractAbstract We study satisfiability modulo the theory of finite fields and give a decision procedure for this theory. We implement our procedure for prime fields inside the cvc5 SMT solver. Using this theory, we construct SMT queries that encode translation validation for various zero knowledge proof compilers applied to Boolean computations. We evaluate our procedure on these benchmarks. Our experiments show that our implementation is superior to previous approaches (which encode field arithmetic using integers or bit-vectors). Alex Ozdemir, Gereon Kremer, Cesare Tinelli, Clark W. Barrett |
CAV (2) | 3 |
| 2023 | CRV: Automated Cyber-Resiliency Reasoning for System Design Models
Daniel Larraz, Robert Lorch, Moosa Yahyazadeh, M. Fareed Arif, Omar Chowdhury, Cesare Tinelli |
FMCAD | 6 |
| 2023 | A Procedure for SyGuS Solution Fitting via Matching and Rewrite Rule Discovery
Abdalrhman Mohamed, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
FMCAD | 4 |
| 2023 | Developing an Open-Source, State-of-the-Art Symbolic Model-Checking Framework for the Model-Checking Research Community
Kristin Y. Rozier, Natarajan Shankar, Cesare Tinelli, Moshe Y. Vardi |
FMCAD | 3 |
| 2023 | Partitioning Strategies for Distributed SMT Solving
Amalee Wilson, Andres Nötzli, Andrew Reynolds 0001, Byron Cook, Cesare Tinelli, Clark W. Barrett |
FMCAD | 5 |
| 2023 | An Interactive SMT Tactic in Coq using Abductive ReasoningabstractA well-known challenge in leveraging automatic theorem provers, such as satisfiability modulo theories (SMT) solvers, to discharge proof obligations from interactive theorem provers (ITPs) is determining which axioms to send to the solver together with the con- jecture to be proven. Too many axioms may confuse or clog the solver, while too few may make a theorem unprovable. When a solver fails to prove a conjecture, it is unclear to the user which case transpired. In this paper we enhance SMTCoq — an integration between the Coq ITP and the cvc5 SMT solver — with a tactic called abduce aimed at mitigating the uncertainty above. When the solver fails to prove the goal, the user may invoke abduce which will use abductive reasoning to provide facts that will allow the solver to prove the goal, if any. Haniel Barbosa, Chantal Keller, Andrew Reynolds 0001, Arjun Viswanathan 0001, Cesare Tinelli, Clark W. Barrett |
LPAR | 5 |
| 2023 | Synthesising Programs with Non-trivial ConstantsabstractAbstract Program synthesis is the mechanised construction of software. One of the main difficulties is the efficient exploration of the very large solution space, and tools often require a user-provided syntactic restriction of the search space. While useful in general, such syntactic restrictions provide little help for the generation of programs that contain non-trivial constants, unless the user is able to provide the constants in advance. This is a fundamentally difficult task for state-of-the-art synthesisers. We propose a new approach to the synthesis of programs with non-trivial constants that combines the strengths of a counterexample-guided inductive synthesiser with those of a theory solver, exploring the solution space more efficiently without relying on user guidance. We call this approach CEGIS( $$\mathcal {T}$$ T ), where $$\mathcal {T}$$ T is a first-order theory. We present two exemplars, one based on Fourier-Motzkin (FM) variable elimination and one based on first-order satisfiability. We demonstrate the practical value of CEGIS( $$\mathcal {T}$$ T ) by automatically synthesising programs for a set of intricate benchmarks. Additionally, we present a case study where we integrate CEGIS( $$\mathcal {T}$$ T ) within the mature synthesiser CVC4 and show that CEGIS( $$\mathcal {T}$$ T ) improves CVC4’s results. Alessandro Abate, Haniel Barbosa, Clark W. Barrett, Cristina David, Pascal Kesseli, Daniel Kroening, Elizabeth Polgreen, Andrew Reynolds 0001, Cesare Tinelli |
J. Autom. Reason. | 9 |
| 2023 | Reasoning About Vectors: Satisfiability Modulo a Theory of Sequences
Ying Sheng 0007, Andres Nötzli, Andrew Reynolds 0001, Yoni Zohar, David L. Dill, Wolfgang Grieskamp, Junkil Park, Shaz Qadeer, Clark W. Barrett, Cesare Tinelli |
J. Autom. Reason. | 10 |
| 2023 | Combining Stable Infiniteness and (Strong) Politeness
Ying Sheng 0007, Yoni Zohar, Christophe Ringeissen, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
J. Autom. Reason. | 6 |
| 2022 | Even Faster Conflicts and Lazier Reductions for String SolversabstractAbstract In the past decade, satisfiability modulo theories (SMT) solvers have been extended to support the theory of strings and regular expressions. This theory has proven to be useful in a wide range of applications in academia and industry. To accommodate the expressive nature of string constraints used in those applications, string solvers use a multi-layered architecture where extended operators are reduced to a set of core operators. These reductions, however, are often costly to reason about. In this work, we propose new techniques for eagerly discovering conflicts based on equality reasoning and lazily avoiding reductions for certain extended functions based on lightweight reasoning. We present a strategy for integrating and scheduling these techniques in a CDCL $$(T)$$ ( T ) -based theory solver for strings and regular expressions. We implement the techniques and the strategy in cvc5, a state-of-the-art SMT solver, and show that they lead to a significant performance improvement."Image missing""Image missing" Andres Nötzli, Andrew Reynolds 0001, Haniel Barbosa, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 5 |
| 2022 | Reconstructing Fine-Grained Proofs of Rewrites Using a Domain-Specific Language
Andres Nötzli, Haniel Barbosa, Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
FMCAD | 7 |
| 2022 | cvc5: A Versatile and Industrial-Strength SMT SolverabstractAbstract cvc5 is the latest SMT solver in the cooperating validity checker series and builds on the successful code base of CVC4. This paper serves as a comprehensive system description of cvc5 ’s architectural design and highlights the major features and components introduced since CVC4 1.8. We evaluate cvc5 ’s performance on all benchmarks in SMT-LIB and provide a comparison against CVC4 and Z3. Haniel Barbosa, Clark W. Barrett, Martin Brain, Gereon Kremer, Hanna Lachnitt, Makai Mann, Abdalrhman Mohamed, Mudathir Mohamed, Aina Niemetz, Andres Nötzli, Alex Ozdemir, Mathias Preiner, Andrew Reynolds 0001, Ying Sheng 0007, Cesare Tinelli, Yoni Zohar |
TACAS (1) | 15 |
| 2022 | Bit-Precise Reasoning via Int-Blasting
Yoni Zohar, Ahmed Irfan, Makai Mann, Aina Niemetz, Andres Nötzli, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
VMCAI | 9 |
| 2021 | Politeness and Stable Infiniteness: Stronger TogetherabstractAbstract We make two contributions to the study of polite combination in satisfiability modulo theories. The first is a separation between politeness and strong politeness, by presenting a polite theory that is not strongly polite. This result shows that proving strong politeness (which is often harder than proving politeness) is sometimes needed in order to use polite combination. The second contribution is an optimization to the polite combination method, obtained by borrowing from the Nelson-Oppen method. The Nelson-Oppen method is based on guessing arrangements over shared variables. In contrast, polite combination requires an arrangement overallvariables of the shared sorts. We show that when using polite combination, if the other theory is stably infinite with respect to a shared sort, only the shared variables of that sort need be considered in arrangements, as in the Nelson-Oppen method. The time required to reason about arrangements is exponential in the worst case, so reducing the number of variables considered has the potential to improve performance significantly. We show preliminary evidence for this by demonstrating a speed-up on a smart contract verification benchmark. Ying Sheng 0007, Yoni Zohar, Christophe Ringeissen, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
CADE | 6 |
| 2021 | Merit and Blame Assignment with Kind 2
Daniel Larraz, Mickaël Laurent, Cesare Tinelli |
FMICS | 3 |
| 2021 | Smt-Switch: A Solver-Agnostic C++ API for SMT Solving
Makai Mann, Amalee Wilson, Yoni Zohar, Lindsey Stuntz, Ahmed Irfan, Kristopher Brown, Caleb Donovick, Allison Guman, Cesare Tinelli, Clark W. Barrett |
SAT | 9 |
| 2021 | Syntax-Guided Quantifier InstantiationabstractAbstract This paper presents a novel approach for quantifier instantiation in Satisfiability Modulo Theories (SMT) that leverages syntax-guided synthesis (SyGuS) to choose instantiation terms. It targets quantified constraints over background theories such as (non)linear integer, reals and floating-point arithmetic, bit-vectors, and their combinations. Unlike previous approaches for quantifier instantiation in these domains which rely on theory-specific strategies, the new approach can be applied to any (combined) theory, when provided with a grammar for instantiation terms for all sorts in the theory. We implement syntax-guided instantiation in the SMT solver CVC4, leveraging its support for enumerative SyGuS. Our experiments demonstrate the versatility of the approach, showing that it is competitive with or exceeds the performance of state-of-the-art solvers on a range of background theories. Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
TACAS (2) | 5 |
| 2021 | On solving quantified bit-vector constraints using invertibility conditions
Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
Formal Methods Syst. Des. | 5 |
| 2021 | Towards Satisfiability Modulo Parametric Bit-vectors
Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Yoni Zohar, Clark W. Barrett, Cesare Tinelli |
J. Autom. Reason. | 6 |
| 2020 | SYSLITE: Syntax-Guided Synthesis of PLTL Formulas from Finite TracesabstractWe present an efficient approach to learn past-time linear temporal logic formulas (PLTL) from a set of propositional variables and a sample of finite traces over those variables.The efficiency of our approach can be attributed to a careful encoding of the PLTL formula learning problem as a bit-vector function synthesis problem, and the use of an enhanced Syntax-Guided Synthesis (SyGuS) engine to solve the latter.We implemented our approach in a tool called SYSLITE and empirically evaluated its efficacy with two case studies.In these case studies, we observe that SYSLITE on average enjoys a speedup of 44x over current learning approaches for temporal formulas while learning the expected formulas in the vast majority of cases. M. Fareed Arif, Daniel Larraz, Mitziu Echeverria, Andrew Reynolds 0001, Omar Chowdhury, Cesare Tinelli |
FMCAD | 6 |
| 2020 | Reductions for Strings and Regular Expressions RevisitedabstractThe theory of strings supported by solvers in formal methods contains a large number of operators.Instead of implementing a semi-decision procedure that reasons about all the operators directly, string solvers often reduce operators to a core fragment and implement a semi-decision procedure over that fragment.These reductions considerably increase the number of constraints and thus have to be done carefully to achieve good performance.We propose novel reductions from regular expressions to string constraints and a framework for minimizing the introduction of new variables in current reductions of string constraints.The reductions of regular expression constraints enable string solvers to handle a significant fragment of such constraints without using dedicated reasoning over regular expressions.Minimizing the number of variables in the reduced constraints makes those constraints significantly cheaper to solve by the core solver.An experimental evaluation of our implementation of both techniques in CVC4, a state-of-the-art SMT solver with extensive support for the theory of strings, shows that they significantly improve the solver's performance. Andrew Reynolds 0001, Andres Nötzli, Clark W. Barrett, Cesare Tinelli |
FMCAD | 4 |
| 2020 | Preface to the Special Issue on Automated Reasoning Systems
Armin Biere, Cesare Tinelli, Christoph Weidenbach |
J. Autom. Reason. | 2 |
| 2020 | Symbolic computation and satisfiability checking
James H. Davenport, Matthew England 0001, Alberto Griggio, Thomas Sturm 0001, Cesare Tinelli |
J. Symb. Comput. | 5 |
| 2019 | Extending SMT Solvers to Higher-Order Logic
Haniel Barbosa, Andrew Reynolds 0001, Daniel El Ouraoui, Cesare Tinelli, Clark W. Barrett |
CADE | 4 |
| 2019 | Towards Bit-Width-Independent Proofs in SMT Solvers
Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Yoni Zohar, Clark W. Barrett, Cesare Tinelli |
CADE | 6 |
| 2019 | Invertibility Conditions for Floating-Point FormulasabstractAutomated reasoning procedures are essential for a number of applications that involve bit-exact floating-point computations. This paper presents conditions that characterize when a variable in a floating-point constraint has a solution, which we call invertibility conditions. We describe a novel workflow that combines human interaction and a syntax-guided synthesis (SyGuS) solver that was used for discovering these conditions. We verify our conditions for several floating-point formats. One implication of this result is that a fragment of floating-point arithmetic admits compact quantifier elimination. We implement our invertibility conditions in a prototype extension of our solver CVC4, showing their usefulness for solving quantified constraints over floating-points. Martin Brain, Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 6 |
| 2019 | cvc4sy: Smart and Fast Term Enumeration for Syntax-Guided SynthesisabstractWe present cvc 4 sy , a syntax-guided synthesis (SyGuS) solver based on three bounded term enumeration strategies. The first encodes term enumeration as an extension of the quantifier-free theory of algebraic datatypes. The second is based on a highly optimized brute-force algorithm. The third combines elements of the others. Our implementation of the strategies within the satisfiability modulo theories (SMT) solver cvc 4 and a heuristic to choose between them leads to significant improvements over state-of-the-art SyGuS solvers. Andrew Reynolds 0001, Haniel Barbosa, Andres Nötzli, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 5 |
| 2019 | High-Level Abstractions for Simplifying Extended String Constraints in SMTabstractSatisfiability Modulo Theories (SMT) solvers with support for the theory of strings have recently emerged as powerful tools for reasoning about string-manipulating programs. However, due to the complex semantics of extended string functions , it is challenging to develop scalable solvers for the string constraints produced by program analysis tools. We identify several classes of simplification techniques that are critical for the efficient processing of string constraints in SMT solvers. These techniques can reduce the size and complexity of input constraints by reasoning about arithmetic entailment, multisets, and string containment relationships over input terms. We provide experimental evidence that implementing them results in significant improvements over the performance of state-of-the-art SMT solvers for extended string constraints. Andrew Reynolds 0001, Andres Nötzli, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 4 |
| 2019 | Extending enumerative function synthesis via SMT-driven classificationabstractMany relevant problems in formal methods can be tackled using enumerative syntax-guided synthesis (SyGuS). Algorithms for enumerative SyGuS range from universally applicable techniques based on counterexample-guided inductive synthesis (CEGIS), to more scalable but specialized techniques based on divide and conquer. This paper presents a novel algorithm for enumerative SyGuS, Unif + PI, which reaps the benefits of scalability based on divide and conquer without sacrificing generality. In this algorithm, an instance of an SMT solver is used as both a classifier and an attribute generator. Logical constraints in the form of test cases for the function-to-synthesize and failed classification attempts guide its search for new candidate solutions. We implement our approach as an extension of the CVC4SY solver and evaluate it on standard SyGuS benchmarks from different applications. We show that the new algorithm leads to significant gains in invariant synthesis with respect to state-of-the-art SyGuS solvers, and is competitive with state-of-the-art k-induction based model checking. Haniel Barbosa, Andrew Reynolds 0001, Daniel Larraz, Cesare Tinelli |
FMCAD | 4 |
| 2019 | Syntax-Guided Rewrite Rule Enumeration for SMT Solvers
Andres Nötzli, Andrew Reynolds 0001, Haniel Barbosa, Aina Niemetz, Mathias Preiner, Clark W. Barrett, Cesare Tinelli |
SAT | 7 |
| 2019 | Refutation-based synthesis in SMT
Andrew Reynolds 0001, Viktor Kuncak, Cesare Tinelli, Clark W. Barrett, Morgan Deters |
Formal Methods Syst. Des. | 3 |
| 2018 | Solving Quantified Bit-Vectors Using Invertibility ConditionsabstractWe present a novel approach for solving quantified bit-vector formulas in Satisfiability Modulo Theories (SMT) based on computing symbolic inverses of bit-vector operators. We derive conditions that precisely characterize when bit-vector constraints are invertible for a representative set of bit-vector operators commonly supported by SMT solvers. We utilize syntax-guided synthesis techniques to aid in establishing these conditions and verify them independently by using several SMT solvers. We show that invertibility conditions can be embedded into quantifier instantiations using Hilbert choice expressions, and give experimental evidence that a counterexample-guided approach for quantifier instantiation utilizing these techniques leads to performance improvements with respect to state-of-the-art solvers for quantified bit-vector constraints. Aina Niemetz, Mathias Preiner, Andrew Reynolds 0001, Clark W. Barrett, Cesare Tinelli |
CAV (2) | 5 |
| 2018 | Reasoning with Finite Sets and Cardinality Constraints in SMTabstractWe consider the problem of deciding the satisfiability of quantifier-free formulas in the theory of finite sets with cardinality constraints. Sets are a common high-level data structure used in programming; thus, such a theory is useful for modeling program constructs directly. More importantly, sets are a basic construct of mathematics and thus natural to use when formalizing the properties of computational systems. We develop a calculus describing a modular combination of a procedure for reasoning about membership constraints with a procedure for reasoning about cardinality constraints. Cardinality reasoning involves tracking how different sets overlap. For efficiency, we avoid considering Venn regions directly, as done in previous work. Instead, we develop a novel technique wherein potentially overlapping regions are considered incrementally as needed, using a graph to track the interaction among the different regions. The calculus has been designed to facilitate its implementation within SMT solvers based on the DPLL($T$) architecture. Our experimental results demonstrate that the new techniques are competitive with previous techniques and can scale much better on certain classes of problems. Kshitij Bansal, Clark W. Barrett, Andrew Reynolds 0001, Cesare Tinelli |
Log. Methods Comput. Sci. | 4 |
| 2017 | Relational Constraint Solving in SMT
Baoluo Meng, Andrew Reynolds 0001, Cesare Tinelli, Clark W. Barrett |
CADE | 3 |
| 2017 | SMTCoq: A Plug-In for Integrating SMT Solvers into Coq
Burak Ekici, Alain Mebsout, Cesare Tinelli, Chantal Keller, Guy Katz, Andrew Reynolds 0001, Clark W. Barrett |
CAV (2) | 3 |
| 2017 | Scaling Up DPLL(T) String Solvers Using Context-Dependent Simplification
Andrew Reynolds 0001, Maverick Woo, Clark W. Barrett, David Brumley, Cesare Tinelli |
CAV (2) | 6 |
| 2017 | Special issue of the 21st International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2015)
Christel Baier, Cesare Tinelli |
Acta Informatica | 2 |
| 2017 | Some advances in tools and algorithms for the construction and analysis of systems
Christel Baier, Cesare Tinelli |
Int. J. Softw. Tools Technol. Transf. | 2 |
| 2017 | Constraint solving for finite model finding in SMT solversabstractAbstract Satisfiability modulo theories (SMT) solvers have been used successfully as reasoning engines for automated verification and other applications based on automated reasoning. Current techniques for dealing with quantified formulas in SMT are generally incomplete, forcing SMT solvers to report “unknown” when they fail to prove the unsatisfiability of a formula with quantifiers. This inability to return counter models limits their usefulness in applications that produce queries involving quantified formulas. In this paper, we reduce these limitations by integrating finite model finding techniques based on constraint solving into the architecture used by modern SMT solvers. This approach is made possible by a novel solver for cardinality constraints, as well as techniques for on-demand instantiation of quantified formulas. Experiments show that our approach is competitive with the state of the art in SMT, and orthogonal to approaches in automated theorem proving. Andrew Reynolds 0001, Cesare Tinelli, Clark W. Barrett |
Theory Pract. Log. Program. | 2 |
| 2016 | The Kind 2 Model Checker
Adrien Champion, Alain Mebsout, Christoph Sticksel, Cesare Tinelli |
CAV (2) | 4 |
| 2016 | Lazy proofs for DPLL(T)-based SMT solversabstractWith the integration of SMT solvers into analysis frameworks aimed at ensuring a system's end-to-end correctness, having a high level of confidence in these solvers' results has become crucial. For unsatisfiable queries, a reasonable approach is to have the solver return an independently checkable proof of unsatisfiability. We propose a lazy, extensible and robust method for enhancing DPLL(T)-style SMT solvers with proof-generation capabilities. Our method maintains separate Boolean-level and theory-level proofs, and weaves them together into one coherent artifact. Each theory-specific solver is called upon lazily, a posteriori, to prove precisely those solution steps it is responsible for and that are needed for the final proof. We present an implementation of our technique in the CVC4 SMT solver, capable of producing unsatisfiability proofs for quantifier-free queries involving uninterpreted functions, arrays, bitvectors and combinations thereof. We discuss an evaluation of our tool using industrial benchmarks and benchmarks from the SMT-LIB library, which shows promising results. Guy Katz, Clark W. Barrett, Cesare Tinelli, Andrew Reynolds 0001, Liana Hadarean |
FMCAD | 3 |
| 2016 | Proof certificates for SMT-based model checkers for infinite-state systemsabstractWe present a dual technique for generating and verifying proof certificates in SMT-based model checkers, focusing on proofs of invariant properties. Certificates for two major model checking algorithms are extracted as k-inductive invariants, minimized and then reduced to a formal proof term with the help of an independent proof-producing SMT solver. SMT-based model checkers typically translate input problems into an internal first-order logic representation. In our approach, the correctness of translation from the model checker's input to the internal representation is verified in a lightweight manner by proving the observational equivalence between the results of two independent translations. This second proof is done by the model checker itself and generates in turn its own proof certificate. Our experimental evaluation show that, at the price of minimal instrumentation in the model checker, the approach allows one to efficiently generate and verify proof certificates for non-trivial transition systems and invariance queries. Alain Mebsout, Cesare Tinelli |
FMCAD | 2 |
| 2016 | CoCoSpec: A Mode-Aware Contract Language for Reactive Systems
Adrien Champion, Arie Gurfinkel, Temesghen Kahsai, Cesare Tinelli |
SEFM | 4 |
| 2016 | An efficient SMT solver for string constraints
Andrew Reynolds 0001, Nestan Tsiskaridze, Cesare Tinelli, Clark W. Barrett, Morgan Deters |
Formal Methods Syst. Des. | 4 |
| 2015 | An Automatable Formal Semantics for IEEE-754 Floating-Point ArithmeticabstractAutomated reasoning tools often provide little or no support to reason accurately and efficiently about floating-point arithmetic. As a consequence, software verification systems that use these tools are unable to reason reliably about programs containing floating-point calculations or may give unsound results. These deficiencies are in stark contrast to the increasing awareness that the improper use of floating-point arithmetic in programs can lead to unintuitive and harmful defects in software. To promote coordinated efforts towards building efficient and accurate floating-point reasoning engines, this paper presents a formalization of the IEEE-754 standard for floating-point arithmetic as a theory in many-sorted first-order logic. Benefits include a standardized syntax and unambiguous semantics, allowing tool interoperability and sharing of benchmarks, and providing a basis for automated, formal analysis of programs that process floating-point data. Martin Brain, Cesare Tinelli, Philipp Rümmer, Thomas Wahl |
ARITH | 2 |
| 2015 | Counterexample-Guided Quantifier Instantiation for Synthesis in SMT
Andrew Reynolds 0001, Morgan Deters, Viktor Kuncak, Cesare Tinelli, Clark W. Barrett |
CAV (2) | 4 |
| 2015 | Fine Grained SMT Proofs for the Theory of Fixed-Width Bit-Vectors
Liana Hadarean, Clark W. Barrett, Andrew Reynolds 0001, Cesare Tinelli, Morgan Deters |
LPAR | 4 |
| 2014 | A Tale of Two Solvers: Eager and Lazy Approaches to Bit-Vectors
Liana Hadarean, Kshitij Bansal, Dejan Jovanovic, Clark W. Barrett, Cesare Tinelli |
CAV | 5 |
| 2014 | A DPLL(T) Theory Solver for a Theory of Strings and Regular Expressions
Andrew Reynolds 0001, Cesare Tinelli, Clark W. Barrett, Morgan Deters |
CAV | 3 |
| 2014 | Leveraging linear and mixed integer programming for SMTabstractSMT solvers combine SAT reasoning with specialized theory solvers either to find a feasible solution to a set of constraints or to prove that no such solution exists. Linear programming (LP) solvers come from the tradition of optimization, and are designed to find feasible solutions that are optimal with respect to some optimization function. Typical LP solvers are designed to solve large systems quickly using floating point arithmetic. Because floating point arithmetic is inexact, rounding errors can lead to incorrect results, making inexact solvers inappropriate for direct use in theorem proving. Previous efforts to leverage such solvers in the context of SMT have concluded that in addition to being potentially unsound, such solvers are too heavyweight to compete in the context of SMT. In this paper, we describe a technique for integrating LP solvers that improves the performance of SMT solvers without compromising correctness. These techniques have been implemented using the SMT solver CVC4 and the LP solver GLPK. Experiments show that this implementation outperforms other state-of-the-art SMT solvers on the QF_LRA SMT-LIB benchmarks and is competitive on the QF_LIA benchmarks. Tim King 0001, Clark W. Barrett, Cesare Tinelli |
FMCAD | 3 |
| 2014 | A tour of CVC4: How it works, and how to use itabstractCVC4 is a solver for Satisfiability Modulo Theories (SMT). This tutorial aims to give participants an overview of SMT, describe the main features of CVC4, and walk through in-depth examples using CVC4 to demonstrate how to solve real problems with an SMT solver. We will provide a detailed description of various aspects of CVC4's internals, including its architecture, its capacity for dealing with quantifiers, its finite model finder, and the linear arithmetic solver. We will show examples of software and hardware verification problems, and how they are encoded and handled by these features in CVC4. Participants are expected to have only a basic knowledge of what SMT is. This tutorial will give casual users a taste of encoding complex, real-world problems in SMT and effectively using CVC4 to solve them. Participants will be left with some knowledge of what goes on inside a modern SMT solver and some of the practical issues that arise in using them. CVC4, jointly developed at New York University and the University of Iowa, is freely available for both research and commercial use under an open-source license. The organizers of this tutorial are all architects and implementors of CVC4 and have extensive expertise in the area of SMT. Morgan Deters, Andrew Reynolds 0001, Tim King 0001, Clark W. Barrett, Cesare Tinelli |
FMCAD | 5 |
| 2014 | Finding conflicting instances of quantified formulas in SMTabstractIn the past decade, Satisfiability Modulo Theories (SMT) solvers have been used successfully in a variety of applications including verification, automated theorem proving, and synthesis. While such solvers are highly adept at handling ground constraints in several decidable background theories, they primarily rely on heuristic quantifier instantiation methods such as E-matching to process quantified formulas. The success of these methods is often hindered by an overproduction of instantiations which makes ground level reasoning difficult. We introduce a new technique that alleviates this shortcoming by first discovering instantiations that are in conflict with the current state of the solver. The solver only resorts to traditional heuristic methods when such instantiations cannot be found, thus decreasing its dependence upon E-matching. Our experimental results show that our technique significantly reduces the number of instantiations required by an SMT solver to answer "unsatisfiable" for several benchmark libraries, and consequently leads to improvements over state-of-the-art implementations. Andrew Reynolds 0001, Cesare Tinelli, Leonardo de Moura 0001 |
FMCAD | 2 |
| 2013 | Quantifier Instantiation Techniques for Finite Model Finding in SMT
Andrew Reynolds 0001, Cesare Tinelli, Amit Goel, Sava Krstic, Morgan Deters, Clark W. Barrett |
CADE | 2 |
| 2013 | Finite Model Finding in SMT
Andrew Reynolds 0001, Cesare Tinelli, Amit Goel, Sava Krstic |
CAV | 2 |
| 2013 | SMT proof checking using a logical framework
Aaron Stump, Duckki Oe, Andrew Reynolds 0001, Liana Hadarean, Cesare Tinelli |
Formal Methods Syst. Des. | 5 |
| 2012 | Model Evolution with equality - Revised and implemented
Peter Baumgartner 0001, Björn Pelzer, Cesare Tinelli |
J. Symb. Comput. | 3 |
| 2011 | Model Evolution with Equality Modulo Built-in Theories
Peter Baumgartner 0001, Cesare Tinelli |
CADE | 2 |
| 2011 | CVC4
Clark W. Barrett, Christopher L. Conway, Morgan Deters, Liana Hadarean, Dejan Jovanovic, Tim King 0001, Andrew Reynolds 0001, Cesare Tinelli |
CAV | 8 |
| 2010 | Foundations of Satisfiability Modulo Theories
Cesare Tinelli |
WoLLIC | 1 |
| 2009 | Ground Interpolation for Combined Theories
Amit Goel, Sava Krstic, Cesare Tinelli |
CADE | 3 |
| 2009 | Ground Interpolation for the Theory of Equality
Alexander Fuchs 0003, Amit Goel, Jim Grundy, Sava Krstic, Cesare Tinelli |
TACAS | 5 |
| 2008 | Scaling Up the Formal Verification of Lustre Programs with SMT-Based TechniquesabstractWe present a general approach for verifying safety properties of Lustre programs automatically. Key aspects of the approach are the choice of an expressive first-order logic in which Lustre's semantics is modeled very naturally, the tailoring to this logic of SAT-based k-induction and abstraction techniques, and the use of SMT solvers to reason efficiently in this logic. We discuss initial experimental results showing that our implementation of the approach is highly competitive with existing verification solutions for Lustre. George Hagen, Cesare Tinelli |
FMCAD | 2 |
| 2008 | (LIA) - Model Evolution with Linear Integer Arithmetic Constraints
Peter Baumgartner 0001, Alexander Fuchs 0003, Cesare Tinelli |
LPAR | 3 |
| 2008 | The model evolution calculus as a first-order DPLL method
Peter Baumgartner 0001, Cesare Tinelli |
Artif. Intell. | 2 |
| 2007 | Solving Quantified Verification Conditions Using Satisfiability Modulo Theories
Yeting Ge, Clark W. Barrett, Cesare Tinelli |
CADE | 3 |
| 2007 | CVC3
Clark W. Barrett, Cesare Tinelli |
CAV | 2 |
| 2007 | An Abstract Framework for Satisfiability Modulo Theories
Cesare Tinelli |
TABLEAUX | 1 |
| 2007 | Combined Satisfiability Modulo Parametric Theories
Sava Krstic, Amit Goel, Jim Grundy, Cesare Tinelli |
TACAS | 4 |
| 2006 | Splitting on Demand in SAT Modulo Theories
Clark W. Barrett, Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
LPAR | 4 |
| 2006 | Lemma Learning in the Model Evolution Calculus
Peter Baumgartner 0001, Alexander Fuchs 0003, Cesare Tinelli |
LPAR | 3 |
| 2006 | A new combination procedure for the word problem that generalizes fusion decidability results in modal logics
Franz Baader, Silvio Ghilardi, Cesare Tinelli |
Inf. Comput. | 3 |
| 2006 | Solving SAT and SAT Modulo Theories: From an abstract Davis--Putnam--Logemann--Loveland procedure to DPLL(T)abstractWe first introduce Abstract DPLL , a rule-based formulation of the Davis--Putnam--Logemann--Loveland (DPLL) procedure for propositional satisfiability. This abstract framework allows one to cleanly express practical DPLL algorithms and to formally reason about them in a simple way. Its properties, such as soundness, completeness or termination, immediately carry over to the modern DPLL implementations with features such as backjumping or clause learning.We then extend the framework to Satisfiability Modulo background Theories (SMT) and use it to model several variants of the so-called lazy approach for SMT. In particular, we use it to introduce a few variants of a new, efficient and modular approach for SMT based on a general DPLL( X ) engine, whose parameter X can be instantiated with a specialized solver Solver T for a given theory T , thus producing a DPLL( T ) system. We describe the high-level design of DPLL( X ) and its cooperation with Solver T , discuss the role of theory propagation , and describe different DPLL( T ) strategies for some theories arising in industrial applications.Our extensive experimental evidence, summarized in this article, shows that DPLL( T ) systems can significantly outperform the other state-of-the-art tools, frequently even in orders of magnitude, and have better scaling properties. Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
J. ACM | 3 |
| 2005 | The Model Evolution Calculus with Equality
Peter Baumgartner 0001, Cesare Tinelli |
CADE | 2 |
| 2005 | Combining Nonstably Infinite Theories
Cesare Tinelli, Calogero G. Zarba |
J. Autom. Reason. | 1 |
| 2004 | DPLL( T): Fast Decision Procedures
Harald Ganzinger, George Hagen, Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
CAV | 5 |
| 2004 | Combining Decision Procedures for Sorted Theories
Cesare Tinelli, Calogero G. Zarba |
JELIA | 1 |
| 2004 | Abstract DPLL and Abstract DPLL Modulo Theories
Robert Nieuwenhuis, Albert Oliveras, Cesare Tinelli |
LPAR | 3 |
| 2003 | The Model Evolution Calculus
Peter Baumgartner 0001, Cesare Tinelli |
CADE | 2 |
| 2003 | Cooperation of Background Reasoners in Theory Reasoning by Residue Sharing
Cesare Tinelli |
J. Autom. Reason. | 1 |
| 2003 | Unions of non-disjoint theories and combinations of satisfiability procedures
Cesare Tinelli, Christophe Ringeissen |
Theor. Comput. Sci. | 1 |
| 2003 | Preface
Cesare Tinelli, Teodor Rus |
Theor. Comput. Sci. | 1 |
| 2002 | A DPLL-Based Calculus for Ground Satisfiability Modulo Theories
Cesare Tinelli |
JELIA | 1 |
| 2002 | Combining Decision Procedures for Positive Theories Sharing Constructors
Franz Baader, Cesare Tinelli |
RTA | 2 |
| 2002 | Deciding the Word Problem in the Union of Equational Theories
Franz Baader, Cesare Tinelli |
Inf. Comput. | 2 |
| 1999 | Deciding the Word Problem in the Union of Equational Theories Sharing Constructors
Franz Baader, Cesare Tinelli |
RTA | 2 |
| 1997 | A New Approach for Combining Decision Procedure for the Word Problem, and Its Connection to the Nelson-Oppen Combination Method
Franz Baader, Cesare Tinelli |
CADE | 2 |
| 1996 | Constraint Logic Programming over Unions of Constraint Theories
Cesare Tinelli, Mehdi T. Harandi |
CP | 1 |
| 1991 | An analysis of incremental assistant capabilities of a software evolution expert systemabstractThe authors propose to do maintenance with the software system model (SSM) that provides the maintainer with a number of alternative views of the code. To make an understandable presentation of more information than the code contains, the expert system must offer information system capabilities, such as semantic retrieval and intelligent indexing. An analysis of the capabilities and the degrees of assistance of a software evolution expert system (SEES) is given in an incremental framework. The authors address SEES reasoning directed by knowledge in models of views, analyze SEES capabilities, and point out different degrees of assistance and models of views. Some tradeoffs in SEES development are discussed and evaluated. The analysis has led to five functional architectures. Each architecture assumes that one has one or more view models available. The authors describe the results of the first SEES prototype.> Gianna Avellis, Andrea Iacobbe, Dario Palmisano, Giovanni Semeraro, Cesare Tinelli |
ICSM | 5 |