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Faraz Ahmad

dblp:37/7934 · DBLP profile ↗
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9ranked-venue papers
4as first author
1since 2021 · last 2022
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 4 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 3 · 1 since 2021Artificial intelligence and machine learning · 2Databases, data management, data science and information retrieval · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Cloud and datacenter computing · 48% Energy-efficient computing · 26% Processor architecture and microarchitecture · 13%
Software engineering, system software, and programming languages
1 paper
Debugging and program repair · 56% Concurrent programming · 44%

Topics — the 15 heaviest of 17, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing › cluster resource management and scheduling › cluster scheduling
mapreduce scheduling
0.322014
ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters · USENIX ATC 2014
Tarazu: optimizing MapReduce on heterogeneous clusters · ASPLOS 2012
Cloud and datacenter computing
cluster resource management and scheduling
0.212014
ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters · USENIX ATC 2014
Cloud and datacenter computing › cluster resource management and scheduling
cluster resource management
0.112012
Tarazu: optimizing MapReduce on heterogeneous clusters · ASPLOS 2012
Cloud and datacenter computing › cluster resource management and scheduling › cluster scheduling
heterogeneous cluster scheduling
0.112012
Tarazu: optimizing MapReduce on heterogeneous clusters · ASPLOS 2012
Parallel and multicore computing
load balancing
0.112012
Tarazu: optimizing MapReduce on heterogeneous clusters · ASPLOS 2012
Debugging and program repair › record and replay
deterministic replay
0.112010
Timetraveler: exploiting acyclic races for optimizing memory race recording · ISCA 2010
Concurrent programming
memory models
0.112010
Timetraveler: exploiting acyclic races for optimizing memory race recording · ISCA 2010
Energy-efficient computing › thermal management
cooling optimization
0.112010
Joint optimization of idle and cooling power in data centers while maintaining response time · ASPLOS 2010
Energy-efficient computing
datacenter power management
0.112010
Joint optimization of idle and cooling power in data centers while maintaining response time · ASPLOS 2010
Energy-efficient computing › power management › dynamic power management
idle power reduction
0.112010
Joint optimization of idle and cooling power in data centers while maintaining response time · ASPLOS 2010
Processor architecture and microarchitecture › multicore design
memory race recording
0.112010
Timetraveler: exploiting acyclic races for optimizing memory race recording · ISCA 2010
Processor architecture and microarchitecture
multicore design
0.112010
Timetraveler: exploiting acyclic races for optimizing memory race recording · ISCA 2010
Energy-efficient computing › datacenter power management
server power management
0.112010
Joint optimization of idle and cooling power in data centers while maintaining response time · ASPLOS 2010
Electronic design automation › high-level synthesis
scheduling
0.112014
ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters · USENIX ATC 2014
Debugging and program repair
fault localization
0.012010
Timetraveler: exploiting acyclic races for optimizing memory race recording · ISCA 2010

Methods — techniques the papers use, named apart from their topics

predictive load balancing · 0.3communication-aware load balancing · 0.3time-delay buffer · 0.2post-dating · 0.2acyclic race exploitation · 0.2workload traces · 0.1power trading · 0.1over-provisioning · 0.1
YearPublicationVenuePosition
2022 Automated Detection of ERP artifacts of auditory oddball paradigm by Unsupervised Machine Learning Algorithm
abstract
Electroencephalography (EEG) is a non-invasive method that can test and detect the working status of the human brain. The time-locked measure of the EEG to the external stimuli is known as Event-Related Potential (ERP). ERP has the ability to observe human brain activities in real-time and it can help to elucidate the responses of the human brain to stimuli. However, EEG is an irregular combination of neural and non-neural sources of activities, and these non-neural (non-EEG) sources of activities are known as artifacts. Artifacts of mixed signals may degrade the quality of EEG signals by decreasing SNR (signal-to-noise ratio) and may lead to erroneous conclusions in the ERP study. The main goal of this research is to record and analyze clean EEG data so that the experimental results are valid and statistically significant. This project addresses this aim by introducing a machine learning algorithm (MLA) that can screen EEG/ERP data, detect unfocused or artifacts mixed data epochs and then remove those data epochs from the signal. Overall, five types of unsupervised MLA are applied to detect unfocused ERP epochs and among them, the DBScan method shows the best performance with an artifact detection efficiency of 92%. In addition to being efficient, this MLA is also very time effective. Finally, the success of this study will allow ERP to be used as a biomarker in real-world applications.
Rafia Akhter, Faraz Ahmad, Fred R. Beyette
CIBCB2
2019 Enterprise-wide Machine Learning using Teradata Vantage: An Integrated Analytics Platform
abstract
Big data characterized by variety can be divided into 3 principal categories: numeric structured data, semi-structured data, and unstructured multimedia data involving audio, video, and text. Decision making requires multiple analytical engines suitable for each type of data, programming languages, algorithms, visualization tools, and user interfaces. More often than not, industrial analytics is conducted ad hoc by lashing together analytics components such as distributed data sources, analytics engines, and algorithms. This kind of piecemeal approach ignores scale, security, governance, reliability, model management and fault tolerance that are paramount for industrial strength analytics. A unified, versatile, and robust architecture that combines various components in a single integrated platform is the need of the hour. Teradata Vantage (TD Vantage) is such a platform for delivering production quality enterprise analytics at scale. In this paper, we outline the proposed TD Vantage (available in the market and under continuous development) that unifies data, engines, and algorithms operating in a seamless symphony. We will demonstrate its capabilities through three proofs of concept biz: image data using TensorFlow, text data using Spark, and transaction data using Aster (now renamed Machine Learning Engine or MLE), with Teradata orchestrating interactions among the various components.
Choudur Lakshminarayan, Thiagarajan Ramakrishnan, Awny Al-Omari, Khaled Bouaziz, Faraz Ahmad, Sri Raghavan, Prama Agarwal
IEEE BigData5
2019 Model Management and Handwritten Character Recognition: An Enterprise Solution
abstract
Ease-of-use analytics at scale is the holy grail of industrial strength machine learning. In order to reap benefits from the mother-lode of business related data; tools, technologies, and analytical functions should operate in perpetual symphony to derive insightful business outcomes. While there have been advances in APIs, algorithms, and user interfaces, building an end to end workflow spanning data ingestion, data preparation, model training, model scoring, visualization and finally continuous improvement and model management received limited investment. In this paper we demonstrate an analytical workflow that integrates multiple analytical tools and techniques for image recognition wrapped in the model management framework. As analytics in industry is maturing, analytics implementations are no longer one-off, but are components of Analytics Operations known as AnalyticsOps. We introduce the notion of Model Quality Index (MQI) to track model performance. The MQI is similar to Process Capability Index (PCI) common in 6σ programs in manufacturing. Our solution combines relational databases (Teradata DB), Machine Learning (Teradata/Aster), Deep Learning (TensorFlow), Hadoop Distributed File System (HDFS), and user interface tools over a communication fabric (Teradata QueryGrid). In particular, we demonstrate a hand written word recognition use-case for an enterprise customer cast in a model management workflow for repeatable deployments across a range of businesses.
Choudur Lakshminarayan, Thiagarajan Ramakrishnan, Awny Al-Omari, Khaled Bouaziz, Faraz Ahmad, Sri Raghavan, Prama Agarwal
IEEE BigData5
2018 Time and Device Based Priority Induced Demand Side Load Management in Smart Home with Consumer Budget Limit
abstract
In demand side management (DSM) scheduling of appliances based on consumer-defined priorities is an important task of a home energy management controller (EMC). This paper presents a DSM technique that is capable of controlling loads within a smart home considering time-varying appliances priorities. An evolutionary priority algorithm (EPA) was developed based on three postulations that allow time-varying priorities to be quantified in time and device-based features. Based on the input data considering the appliance's power ratings, its time of use, and absolute user comfort values the EPA is able to generate an optimal energy consumption pattern which would give maximum comfort at a predetermined user budget. A cost per unit comfort (χ) index, which relates the consumer expenditure to the achievable comfort is also demonstrated. To test the applicability of the proposed EPA, two budget scenarios of 1.5/day and 2.0/day are performed. The simulation results revealed that the proposed EPA obtained an optimal comfort value for the high budget with increased (χ).
Asif Khan 0006, Nadeem Javaid, Muhammad Nadeem Iqbal, Naveed Anwar, Inzimam ul-Haq, Faraz Ahmad
AINA6
2014 ShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters
Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
USENIX ATC1
2013 MapReduce with communication overlap (MaRCO)
Faraz Ahmad, Seyong Lee, Mithuna Thottethodi, T. N. Vijaykumar
J. Parallel Distributed Comput.1
2012 Tarazu: optimizing MapReduce on heterogeneous clusters
abstract
Data center-scale clusters are evolving towards heterogeneous hardware for power, cost, differentiated price-performance, and other reasons. MapReduce is a well-known programming model to process large amount of data on data center-scale clusters. Most MapReduce implementations have been designed and optimized for homogeneous clusters. Unfortunately, these implementations perform poorly on heterogeneous clusters (e.g., on a 90-node cluster that contains 10 Xeon-based servers and 80 Atom-based servers, Hadoop performs worse than on 10-node Xeon-only or 80-node Atom-only homogeneous sub-clusters for many of our benchmarks). This poor performance remains despite previously proposed optimizations related to management of straggler tasks. In this paper, we address MapReduce's poor performance on heterogeneous clusters. Our first contribution is that the poor performance is due to two key factors: (1) the non-intuitive effect that MapReduce's built-in load balancing results in excessive and bursty network communication during the Map phase, and (2) the intuitive effect that the heterogeneity amplifies load imbalance in the Reduce computation. Our second contribution is Tarazu, a suite of optimizations to improve MapReduce performance on heterogeneous clusters. Tarazu consists of (1) Communication-Aware Load Balancing of Map computation (CALB) across the nodes, (2) Communication-Aware Scheduling of Map computation (CAS) to avoid bursty network traffic and (3) Predictive Load Balancing of Reduce computation (PLB) across the nodes. Using the above 90-node cluster, we show that Tarazu significantly improves performance over a baseline of Hadoop with straightforward tuning for hardware heterogeneity.
Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
ASPLOS1
2010 Joint optimization of idle and cooling power in data centers while maintaining response time
abstract
Server power and cooling power amount to a significant fraction of modern data centers' recurring costs. While data centers provision enough servers to guarantee response times under the maximum loading, data centers operate under much less loading most of the times (e.g., 30-70% of the maximum loading). Previous server-power proposals exploit this under-utilization to reduce the server idle power by keeping active only as many servers as necessary and putting the rest into low-power standby modes. However, these proposals incur higher cooling power due to hot spots created by concentrating the data center loading on fewer active servers, or degrade response times due to standby-to-active transition delays, or both. Other proposals optimize the cooling power but incur considerable idle power. To address the first issue of power, we propose PowerTrade, which trades-off idle power and cooling power for each other, thereby reducing the total power. To address the second issue of response time, we propose SurgeGuard to overprovision the number of active servers beyond that needed by the current loading so as to absorb future increases in the loading. SurgeGuard is a two-tier scheme which uses well-known over-provisioning at coarse time granularities (e.g., one hour) to absorb the common, smooth increases in the loading, and a novel fine-grain replenishment of the over-provisioned reserves at fine time granularities (e.g., five minutes) to handle the uncommon, abrupt loading surges. Using real-world traces, we show that combining PowerTrade and SurgeGuard reduces total power by 30% compared to previous low-power schemes while maintaining response times within 1.7%.
Faraz Ahmad, T. N. Vijaykumar
ASPLOS1
2010 Timetraveler: exploiting acyclic races for optimizing memory race recording
abstract
As chip multiprocessors emerge as the prevalent microprocessor architecture, support for debugging shared-memory parallel programs becomes important. A key difficulty is the programs' nondeterministic semantics due to which replay runs of a buggy program may not reproduce the bug. The non-determinism stems from memory races where accesses from two threads, at least one of which is a write, go to the same memory location. Previous hardware schemes for memory race recording log the predecessor-successor thread ordering at memory races and enforce the same orderings in the replay run to achieve deterministic replay. To reduce the log size, the schemes exploit transitivity in the orderings to avoid recording redundant orderings. To reduce the log size further while requiring minimal hardware, we propose Timetraveler which for the first time exploits acyclicity of races based on the key observation that an acyclic race need not be recorded even if the race is not covered already by transitivity. Timetraveler employs a novel and elegant mechanism called post-dating which both ensures that acyclic races, including those through the L2, are eventually ordered correctly, and identifies cyclic races. To address false cycles through the L2, Timetraveler employs another novel mechanism called time-delay buffer which delays the advancement of the L2 banks' timestamps and thereby reduces the false cycles. Using simulations, we show that Timetraveler reduces the log size for commercial workloads by 88% over the best previous approach while using only a 696-byte time-delay buffer.
Gwendolyn Voskuilen, Faraz Ahmad, T. N. Vijaykumar
ISCA2