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Changyue Liao

dblp:372/1412 · DBLP profile ↗
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2ranked-venue papers
1as first author
2since 2021 · last 2026
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Cloud and datacenter computing · 50% Hardware accelerators and domain-specific architectures · 50%
Artificial intelligence
1 paper
Transfer learning and domain adaptation · 77% Language models and text generation · 23%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Transfer learning and domain adaptation
fine-tuning
0.912025
Ratel: Optimizing Holistic Data Movement to Fine-tune 100B Model on a Consumer GPU · ICDE 2025
Cloud and datacenter computing
computation offloading
0.912025
Ratel: Optimizing Holistic Data Movement to Fine-tune 100B Model on a Consumer GPU · ICDE 2025
Hardware accelerators and domain-specific architectures › accelerator offloading
tensor offloading
0.912025
Ratel: Optimizing Holistic Data Movement to Fine-tune 100B Model on a Consumer GPU · ICDE 2025
Natural language and speech › Language models and text generation
large language model
0.312025
Ratel: Optimizing Holistic Data Movement to Fine-tune 100B Model on a Consumer GPU · ICDE 2025

Methods — techniques the papers use, named apart from their topics

traffic-aware optimization · 1.7gradient offloading · 1.7activation swapping · 1.7
YearPublicationVenuePosition
2026 Disdp: Disaggregating Compute, Network, and Storage for Model-Sharded Data-Parallel Training
abstract
Model-sharded data parallelism (MSDP), e.g., ZeRO, evenly shards the model states across all GPUs, and thus has been widely adopted by LLM pre-training, such as Llama and DeepSeek, due to its low GPU memory capacity requirement. However, MSDP introduces severe overhead from additional network communication collectives (i.e., AllGather and ReduceScatter). Although the collectives themselves only occupy fewer than 10% of GPU SMs, their execution time increases by 41% due to the serial execution of aggregated CPU/GPU-managed compute (i.e., GEMM), network (i.e., NCCL), and storage (i.e., optimizer states). To this end, we present DisDP, a fully disaggregated distributed data-parallel architecture that first fully disaggregates compute, network, and storage for MSDP, such that GPUs only focus on the computing part, and thus the GPU utilization is maximized. The key idea is 1) fully offloading collectives to SmartNICs and SmartSwitch to avoid interference between GEMM kernels and collective kernels, and 2) fully offloading storage to a SmartSwitch-enhanced parameter server that allows a single PS to serve massive workers with linear scalability. DisDP on 8 distributed GPUs outperforms the state-of-the-art training systems by 3.98x when training on a 175B model, validating the efficiency of disaggregation.
Mo Sun 0001, Zihan Yang 0004, Changyue Liao, Yingtao Li 0001, Kaiqi Chen 0002, Fei Wu 0001, Zeke Wang
ISCA3
2025 Ratel: Optimizing Holistic Data Movement to Fine-tune 100B Model on a Consumer GPU
abstract
Nowadays, AI researchers become more and more interested in fine-tuning a pre-trained LLM, whose size has grown to up to over 100B parameters, for their downstream tasks. One approach to fine-tune such huge models is to aggregate device memory from many GPUs. However, this approach introduces prohibitive costs for most data scientists with a limited budget for high-end GPU servers. In this paper, we focus on LLM fine-tuning on a single consumer-grade GPU in a commodity server with limited main memory capacity, which is accessible to most AI researchers. In such a scenario, existing offloading-based methods fail to fine-tune an LLM efficiently due to a lack of holistic intra-server tensor movement management. To this end, we present Ratel, a low-cost, high-performance deep learning training framework that enables efficient 100B-scale model fine-tuning on a commodity server with a consumergrade GPU and limited main memory capacity. The key idea is to add holistic offloading traffic as an optimization dimension for 1) active gradient offloading, and 2) holistic traffic-aware activation swapping mechanism. The experimental results show that 1) Ratel is the first to fine-tune a 175B model on an RTX 4090 and 256 GB main memory, 2) Ratel achieves 2.32x throughput than the state-of-the-art baselines when fine-tuning a small 13B model, and 3) Ratel enables a cheap low-end consumer GPU to have higher cost-effectiveness than a DGX-A100 cluster when fine-tuning a 175B model.
Changyue Liao, Mo Sun 0001, Zihan Yang 0004, Kaiqi Chen 0002, Binhang Yuan, Fei Wu 0001, Zeke Wang
ICDE1