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Sangun Choi

dblp:372/2324 · DBLP profile ↗
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3ranked-venue papers
0as first author
3since 2021 · last 2026
0009-0001-5803-361XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Memory systems · 43% Hardware accelerators and domain-specific architectures · 27% Storage systems · 16%
Artificial intelligence
1 paper
Language models and text generation · 100%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
tiered memory
1.922026
Bauhaus: Restructuring Vector Database for LLM Retrieval on CXL-Based Tiered Memory · IEEE Trans. Computers 2026
TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs · ACM Trans. Storage 2025
Storage systems › data management › storage for machine learning
vector database
1.012026
Bauhaus: Restructuring Vector Database for LLM Retrieval on CXL-Based Tiered Memory · IEEE Trans. Computers 2026
Hardware accelerators and domain-specific architectures › machine learning accelerator
DNN training accelerator
0.912025
TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs · ACM Trans. Storage 2025
Energy-efficient computing
memory energy efficiency
0.912025
TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs · ACM Trans. Storage 2025
Hardware accelerators and domain-specific architectures › machine learning accelerator › neural network accelerator
neural processing unit
0.912025
TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs · ACM Trans. Storage 2025
Memory systems › tiered memory
tiered memory management
0.912025
TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs · ACM Trans. Storage 2025
Natural language and speech › Language models and text generation
retrieval-augmented generation
0.312026
Bauhaus: Restructuring Vector Database for LLM Retrieval on CXL-Based Tiered Memory · IEEE Trans. Computers 2026

Methods — techniques the papers use, named apart from their topics

virtual memory area metadata · 2.0processor event-based sampling · 2.0static data placement · 0.9data splitting · 0.9
YearPublicationVenuePosition
2026 Bauhaus: Restructuring Vector Database for LLM Retrieval on CXL-Based Tiered Memory
abstract
Retrieval-augmented generation pipelines store large volumes of embedding vectors in vector databases for semantic search. In Compute Express Link (CXL)-based tiered memory systems, page-level placement often promotes pages containing both hot and cold vectors, leaving many hot vectors in the long-latency, lower-bandwidth CXL tier. This imbalance increases memory access time, reduces throughput, and worsens tail latency. This paper presents Bauhaus, a software-based memory management technique that increases the share of hot vectors in host memory, thereby improving access efficiency, reducing backend stalls, and lowering tail latency. Bauhaus monitors and reorders embedding vectors at vector-level granularity using Processor Event-Based Sampling (PEBS) and Virtual Memory Area (VMA) metadata, clustering hot vectors into contiguous pages to raise hot-page density and enhance the effectiveness of page promotion. Bauhaus, integrated into the Heterogeneous Memory Software Development Kit (HMSDK) developed and publicly released by SK hynix, is evaluated on a production-grade CXL platform. Across various embedding models, datasets, and CXL-to-host memory ratios, Bauhaus achieves 42.0% higher throughput over the baseline and 15.8% over HMSDK. Bauhaus sustains high RAG performance under constrained host memory capacity, offering a practical solution for large-scale vector database deployments in modern datacenter environments.
Kyungbin Kim, Sungsu Ahn, Wonjung Jeong, Sangun Choi, Minseong Gil, Dongha Jung, Yunjay Hong, Hae-Kang Jung, Yunho Oh
IEEE Trans. Computers5
2025 Kubism: Disassembling and Reassembling K-Means Clustering for Mobile Heterogeneous Platforms
abstract
K-means clustering is widely used in applications such as classification, recommendation, and image processing for its simplicity and efficiency. While often deployed on servers, it is also used on mobile platforms for tasks like sensor data analysis. However, mobile devices face tight hardware and energy constraints, making efficient execution challenging. Prior parallel K-means approaches still suffer from GPU underutilization due to warp divergence and leave CPUs idle. This paper proposes Kubism, a novel software technique that disassembles and reassembles a K-means clustering algorithm to maximize CPU and GPU resource utilization on mobile platforms. Kubism incorporates several key strategies, including reordering operations to minimize unnecessary work, ensuring balanced workloads across processing units to avoid idle time, dynamically adjusting task execution based on real-time performance metrics, and distributing computation efficiently between the CPU and GPU. These methods synergistically improve performance by reducing idle periods and optimizing the use of hardware resources. In our evaluation on the NVIDIA Jetson Orin AGX platform, Kubism achieves up to a 2.65× speedup in individual clustering iterations and an average 1.23× improvement in overall end-to-end execution time compared to prior work.
Seondeok Kim, Sangun Choi, Jaebeom Jeon, Junsu Kim 0005, Minseong Gil, Jaehyeok Ryu, Yunho Oh
LCTES2
2025 TM-Training: An Energy-Efficient Tiered Memory System for Deep Learning Training in NPUs
abstract
DRAM accounts for a large fraction of the total cost of ownership of memory systems in deep learning acceleration systems. To achieve sustainable scalability, tiered memory systems with denser technologies become critical. Prior work has proposed various tiered memory systems, but no matter how a system is designed, data movements between tiers consume substantial energy. In particular, as model sizes and memory capacity demands grow, the data movements between memory tiers become more frequent, posing a challenge that tiered memory systems may reduce deployment costs but suffer from low energy efficiency. If a memory system proactively places data into a tier and timely fetches it from the tier, then the excessive data movement between tiers can be mitigated. We find that a system can statically anticipate such behaviors for all pages and localities. With this insight, we propose a new DNN acceleration system called TM-Training using flash memory. TM-Training capitalizes on the repetitive nature of the same computational patterns during execution, enabling the static establishment of optimal data placement for subsequent operations. Moreover, TM-Training employs a new data-splitting scheme to enable precise memory management. Our evaluation demonstrates that TM-Training reduces inter-tier data traffic by 64% and achieves a 55% higher throughput per watt in training than prior work.
Jaeyong Park, Sangun Choi, Gunjae Koo, Myung Kuk Yoon, Yunho Oh
ACM Trans. Storage2