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Prapti Panigrahi

dblp:372/5638 · DBLP profile ↗
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3ranked-venue papers
1as first author
3since 2021 · last 2025
0000-0003-0701-5072ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Cloud and datacenter computing · 70% Parallel and multicore computing · 23% Hardware accelerators and domain-specific architectures · 7%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing
cluster resource management and scheduling
0.912025
SVDE: Serverless Framework for Low-Latency Video Analytic Queries With Hardware Disaggregation · IEEE Trans. Computers 2025
Parallel and multicore computing › parallel scheduling
heterogeneous scheduling
0.912025
SVDE: Serverless Framework for Low-Latency Video Analytic Queries With Hardware Disaggregation · IEEE Trans. Computers 2025
Cloud and datacenter computing
serverless computing
0.912025
SVDE: Serverless Framework for Low-Latency Video Analytic Queries With Hardware Disaggregation · IEEE Trans. Computers 2025
Cloud and datacenter computing › serverless computing
serverless video analytics
0.912025
SVDE: Serverless Framework for Low-Latency Video Analytic Queries With Hardware Disaggregation · IEEE Trans. Computers 2025

Methods — techniques the papers use, named apart from their topics

decision tree regression · 0.9
YearPublicationVenuePosition
2025 Enhancing Parallelism in Commercial PIM DRAM with LUT-Based Design
Prapti Panigrahi, Rudra Biswas, Alexandar Devic, Narayanan Vijaykrishnan
ACM Great Lakes Symposium on VLSI1
2025 From Secure Storage to Compute-in-Memory: A Versatile Memory System using 1T-nC FeRAM
abstract
This study explores the versatility of 1T-nC ferro-electric RAM (FeRAM) memory capable of operating in both secure storage and highly energy-efficient Compute-in-Memory (CiM) modes without incurring any extra design overhead. In contrast to conventional, volatile 1T-1C Dynamic Random Access Memory (DRAM), having significant energy cost due to the continuous refresh cycles, FeRAM presents a robust non-volatile memory solution, enabling efficient data retention with minimal power consumption. Bitwise logic operations (AND, OR) are efficiently implemented using a single, unmodified 1T-nC FeRAM cell and single-row activation (SRA), while NOT operation is realized by a modified sense amplifier. These facilitate bulk bitwise operations with significant energy benefits compared to multi-row based DRAM solutions. Furthermore, we demonstrate key-based (K) cryptographic operations which help in storing Plain Text (PT) in Cipher Text (CT) format tightly coupled with the memory write/read cycles in secure-mode operation with minimal overload while maintaining robust security. In addition, the advantages of vertical 3D integration of $1 \mathrm{~T}-\mathrm{nC}$ FeRAM are evaluated, and thermal profiling of the remnant polarization ($\mathrm{P}_{\mathrm{R}}$) is done. Furthermore, we demonstrate that 1T-nC FeRAM memory reduces energy consumption by 31% compared to DRAM by assessing 8 real-world data-intensive workloads utilizing bulk bitwise operations.
Rakesh Acharya, Rudra Biswas, Jiahui Duan, Prapti Panigrahi, Kai Ni 0004, Narayanan Vijaykrishnan
VLSI-SoC4
2025 SVDE: Serverless Framework for Low-Latency Video Analytic Queries With Hardware Disaggregation
abstract
Video analytics applications are gaining popularity among serverless environments. One issue that appears in existing serverless platforms is that they do not fully exploit opportunities to efficiently handle video chunking as they assume that all video chunks display similar computation and communication overheads. Those overheads vary and benefit from fine-grained handling. Scheduling non-uniform chunks is even more challenging when the hardware resources are heterogeneous and the network between the resources is non-uniform. To address these challenges, we propose SVDE, a heterogeneous serverless cloud framework for massive video processing workloads. SVDE employs a trained decision tree regression to efficiently decide where to process each video chunk, by holistically considering the non-uniform chunk sizes, heterogeneity of the node hardware, queuing status of each node, and an unbalanced network. Furthermore, we develop an efficient operator backend that will be open-sourced as part of SVDE.Compared to prior works, SVDE achieves up to 3.2× speedup on ten real-world video workloads due to its holistic scheduling decision-making, while our operator backend outperforms the popular Pytorch JIT backend by 5×.
Pingyi Huo, Theodore Michailidis, Prapti Panigrahi, Kiwan Maeng, Jishen Zhao, Narayanan Vijaykrishnan
IEEE Trans. Computers4