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Wenqiang Su

dblp:373/3702 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2025
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 2 · 2 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Cloud and datacenter computing · 69% Reconfigurable computing and FPGAs · 31%
Computer networks
2 papers
Edge and fog computing · 43% Software-defined and programmable networks · 43% Datacenter networks · 15%

Topics — the 4 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing › cloud networking
cloud gateway
0.912025
Albatross: A Containerized Cloud Gateway Platform with FPGA-accelerated Packet-level Load Balancing · SIGCOMM 2025
Reconfigurable computing and FPGAs › FPGA-based network processing
FPGA-based packet processing
0.912025
Albatross: A Containerized Cloud Gateway Platform with FPGA-accelerated Packet-level Load Balancing · SIGCOMM 2025
Edge and fog computing
edge cloud
0.812024
LuoShen: A Hyper-Converged Programmable Gateway for Multi-Tenant Multi-Service Edge Clouds · NSDI 2024
Software-defined and programmable networks
programmable data plane
0.812024
LuoShen: A Hyper-Converged Programmable Gateway for Multi-Tenant Multi-Service Edge Clouds · NSDI 2024

Methods — techniques the papers use, named apart from their topics

rate limiting · 1.7containerization · 1.7FPGA · 1.7programmable gateway · 1.5
YearPublicationVenuePosition
2025 Albatross: A Containerized Cloud Gateway Platform with FPGA-accelerated Packet-level Load Balancing
abstract
Alibaba Cloud's centralized gateways relied heavily on high-capacity switching ASICs, but the abrupt halt of Tofino chip evolution in Jan 2023 forced us to seek alternatives that can meet the requirements of performance, supply-chain security, code reuse, and resource efficiency. After evaluating multiple options, we developed Albatross, our 3rd gen cloud gateway based on FPGA and x86 CPUs. Albatross delivers FPGA-based packet-level load balancing to the host CPUs to prevent CPU core overload, manages large reorder buffers under high-latency jitters (100μs) during complex cloud service processing, and resolves head-of-line (HOL) blocking from packet losses or software exceptions in CPUs. To avoid being overloaded by heavy hitters due to anomalies or attacks, it also implements a two-stage rate limiter for millions of tenants with only 2MB of FPGA memory. To maximize resource utilization, Albatross uses containerization to host multiple gateway instances and designs a BGP proxy to lessen the BGP peering overhead on uplink switches caused by high-density container deployments. After hundreds of man-months of development, a single Albatross node can process 80~120Mpps of cloud network traffic with an average latency of 20μs, reducing gateway and sandbox infra costs by 50%.
Jianyuan Lu, Shunmin Zhu, Tian Pan 0001, Yisong Qiao, Yang Song 0031, Wenqiang Su, Yanqiang Li, Enge Song, Shize Zhang, Xiaoqing Sun, Rong Wen, Xionglie Wei, Biao Lyu, Xing Li 0007
SIGCOMM8
2024 LuoShen: A Hyper-Converged Programmable Gateway for Multi-Tenant Multi-Service Edge Clouds
Tian Pan 0001, Xionglie Wei, Yisong Qiao, Tiesheng Cheng, Wenqiang Su, Yuke Hong, Zhengzhong Wang, Chongjing Dai, Peiqiao Wang, Xuetao Jia, Jianyuan Lu, Enge Song, Biao Lyu, Ennan Zhai, Jiao Zhang 0002, Tao Huang 0005, Dennis Cai, Shunmin Zhu
NSDI9