Compressed-sensing (CS)-based channel estimation is a promising technology for future millimeter wave (mmWave) multiple-input–multiple-output (MIMO) systems, enabling significant pilot reduction and improved estimation accuracy. Channel estimators based on matching pursuit (MP) variants offer lower complexity compared with other CS algorithms, but suffer from high latency due to their iterative nature, hindering efficient hardware implementation. To mitigate this issue, this article introduces a turbo pursuit (TP) strategy that relaxes sequential dependencies in MP variants, enabling parallel processing and pipelined implementation. To demonstrate the effectiveness of TP, this article further introduces turbo implicit pursuit (TIP), a hardware-friendly instance of TP that leverages a prioritized gradient descent (GD) strategy for low-complexity least squares (LS) solving. A hardware auto-generator for TIP is then proposed using a formula representation approach, which constructs a parameterized hardware-algorithm design space and enables hardware-algorithm co-optimization. Our optimized$32 \times 4$TIP MIMO channel estimator ASIC in 65-nm CMOS achieves 0.53-$\mu $s latency under 18.75% measurements. Compared with prior implementations of MP variants, this work achieves higher or comparable estimation accuracy with over 18% latency reduction and over 5$\times$higher throughput to area ratio (TAR) for ASICs, and over 90% latency reduction with over 3$\times$higher hardware efficiency for FPGAs.