EDBT 2026 Demo / reviewers in the wild / expert
Guangyong Shang
dblp:378/5216
· DBLP profile ↗
7ranked-venue papers
1as first author
7since 2021 · last 2026
0009-0000-8571-3605ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 4 since 2021Computer networks · 1 · 1 since 2021Security and privacy · 1 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Shapley value-based fair asynchronous federated learning
Liyong Zhang, Guangyong Shang |
Comput. Commun. | 2 |
| 2026 | LwRustIP: Memory-safe and efficient embedded networking stack with ownership semanticsabstractAs modern embedded systems are increasingly network connected, their protocol stacks expose themselves as a surface that is frequently attacked. While C-based implementations such as LwIP are efficient, their lack of memory safety induces critical vulnerabilities such as buffer overflows, dangling pointers, and use-after-free, leading to remote code execution or privilege escalation. In this paper, we present LwRustIP , a memory-safe embedded networking stack reimplemented in Rust and compatible with LwIP . We also share our development experience. LwRustIP replaces unsafe linked-list memory management with a custom allocator that honors the Rust ownership semantics, leverages zero-copy techniques for inter-layer packet handoffs, and applies lock-free object pools for concurrent buffer management. These design choices ensure memory safety while maintaining performance comparable to traditional C-based implementations. We deploy LwRustIP on ARM-based embedded platforms and evaluate its correctness, performance, and memory safety. Experimental results show that LwRustIP achieves memory safety without incurring measurable performance overhead compared to the original C-based implementation. Our experience highlights the practical challenges and benefits of using Rust for low-level system components and offers guidance for future efforts in memory-safe reengineering of legacy C codebases. Guangyong Shang, Guangpeng Qi, Jianing Ren, Xianqi Jin, Wanjiang Shen, Runyu Pan |
High Confid. Comput. | 1 |
| 2025 | OpenMap: Instruction Grounding via Open-Vocabulary Visual-Language MappingabstractGrounding natural language instructions to visual observations is fundamental for embodied agents operating in open-world environments. Recent advances in visual-language mapping have enabled generalizable semantic representations by leveraging visionlanguage models (VLMs). However, these methods often fall short in aligning free-form language commands with specific scene instances, due to limitations in both instance-level semantic consistency and instruction interpretation. We present OpenMap, a zero-shot open-vocabulary visual-language map designed for accurate instruction grounding in navigation tasks. To address semantic inconsistencies across views, we introduce a Structural-Semantic Consensus constraint that jointly considers global geometric structure and vision-language similarity to guide robust 3D instancelevel aggregation. To improve instruction interpretation, we propose an LLM-assisted Instruction-to-Instance Grounding module that enables fine-grained instance selection by incorporating spatial context and expressive target descriptions. We evaluate OpenMap on ScanNet200 and Matterport3D, covering both semantic mapping and instruction-to-target retrieval tasks. Experimental results show that OpenMap outperforms state-of-the-art baselines in zero-shot settings, demonstrating the effectiveness of our method in bridging free-form language and 3D perception for embodied navigation. Danyang Li 0005, Zenghui Yang, Guangpeng Qi, Songtao Pang, Guangyong Shang, Qiang Ma 0007, Zheng Yang 0002 |
ACM Multimedia | 5 |
| 2025 | FVM: Practical Feather-Weight Virtualization on Commodity MicrocontrollersabstractRecently, there has been an increasing drive to consolidate multiple microcontrollers into one physical entity, due to advantages in reducing overall costs, enhancing reliability, and simplifying hardware interconnections. To reduce consolidation engineering costs, minimizing system latency and memory footprint is important as well as maintaining compatibility with legacy software. In this paper, we propose a virtualization-based solution called Feather-weight Virtual Machine (FVM) that focuses on these goals.FVMenables low latency by specializing the virtualization model to Real-Time Operating Systems (RTOSes), achieves small footprint by adapting management policies to microcontroller memories, attains high compatibility by aligning with microcontroller ecosystem idiosyncrasies, finally allowing practical consolidation across a wide range of commodity microcontrollers. We implement and evaluateFVMon ARMv6-M, ARMv7-M, and RISC-V architectures with two toolchains and two RTOSes, and it can fit into 20 KiB of RAM with less than 5% latency bloat. Runsheng Hou, Guangyong Shang, Huanle Zhang, Xiuzhen Cheng, Runyu Pan |
IEEE Trans. Computers | 3 |
| 2024 | Scaling Permissioned Blockchain through LSM Disaggregation across Execution and Storage NodesabstractPermissioned blockchains are gaining traction for enterprise applications due to their enhanced security and performance characteristics. However, they face significant scalability challenges, particularly in environments with high concurrency and diverse workload demands. In this paper, we present a novel architecture for scaling permissioned blockchains by disaggregating Log-Structured Merge (LSM) trees between execution and storage nodes. Our approach leverages the inherent structure of LSM-trees to efficiently handle write-intensive workloads by separating recent updates in execution nodes and long-term data storage in storage nodes. This design supports elastic scaling of both compute and memory resources, enabling independent and efficient resource utilization. We introduce the concept of Semi-stateful Nodes, which balance the benefits of fully-stateful and stateless nodes. This approach reduces communication overhead during parallel transaction execution while simultaneously improving scalability. Our architecture also includes a parallel transaction execution algorithm to minimize Cross-Shard Transactions (CSTs) and enhance overall system performance. Through our experimentation, we demonstrate that our system achieves significant performance improvements, including up to $15 \times$ increase in throughput compared to traditional architectures. The results indicate that our approach significantly reduces the overhead and time consumption during scalability operations in permissioned blockchains, making it a system that can achieve high scalability and good performance at a low cost. Jiazhou Tian, Guangpeng Qi, Guangyong Shang, Yaxiong Liu, Jingying Li, Delun Wu |
ICPADS | 3 |
| 2024 | BachLedger: Orchestrating Parallel Execution with Dynamic Dependency Detection and Seamless SchedulingabstractBlockchain technology inherently necessitates redundant computation to achieve consensus among untrusted parties because of its fundamental threat model. This requirement, however, compromises system performance and impedes the widespread adoption of blockchain. To leverage existing physical resources, current research on high-performance consortium blockchain algorithms and architectures frequently employs cluster-node architectures to expand the parallel processing capability of traditional single physical nodes. Our investigation reveals a significant trend as the parallel capability of individual nodes improves. The idle time caused by synchronization of all transactions within each block, previously considered negligible, has become increasingly significant. To address this, we present BachLedger, which implements Seamless Scheduling to fully utilize inter-block thread idle time, thereby augmenting system resource utilization and achieving overall performance improvements. Our experimental results demonstrate that our algorithm surpasses current state-of-the-art (SOTA) performance levels in high-performance consortium blockchains and effectively resolves the aforementioned synchronization issue. Furthermore, this scheduling algorithm offers enhanced scalability for BachLedger, positioning it as a promising solution for future blockchain implementations. Guangyong Shang, Guangpeng Qi, Yaxiong Liu, Jiazhou Tian, Aocheng Duan, Jingying Li |
ICPADS | 2 |
| 2024 | Enhancing Large Language Models with Knowledge Graphs for Robust Question AnsweringabstractIn recent years, large language models (LLMs) have shown rapid development, becoming one of the most popular topics in the field of artificial intelligence. LLMs have demonstrated powerful generalization and learning capabilities, and their performance on various language tasks has been remarkable. Despite their successes, LLMs face significant challenges, particularly in domain-specific tasks that require structured knowledge, often leading to issues such as hallucinations. To mitigate these challenges, we propose a novel system, SynaptiQA, which integrates LLMs with Knowledge Graphs (KGs) to answer more questions about knowledge. Our approach leverages the generative capabilities of LLMs to create and optimize KG queries, thereby improving the accuracy and contextual relevance of responses. Experimental results in an industrial data set demonstrate that SynaptiQA outperforms baseline models and naive retrieval-augmented generation (RAG) systems, demonstrating improved accuracy and reduced hallucinations. This integration of KGs with LLMs paves the way for more reliable and interpretable domain-specific question answering systems. Zhui Zhu, Guangpeng Qi, Guangyong Shang, Qingfeng He, Weichen Zhang 0001, Yunzhi Chen, Lijun Hu, Fan Dang 0001 |
ICPADS | 3 |