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Hal W. Daseking

dblp:38/2066 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 91% Integrated circuit design · 9%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test		 0.011982
VISTA: A VLSI CAD System · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1982
Electronic design automation › hardware simulation
multilevel simulation		 0.011982
VISTA: A VLSI CAD System · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1982
Electronic design automation › design automation tools
VLSI CAD		 0.011982
VISTA: A VLSI CAD System · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1982

Methods — techniques the papers use, named apart from their topics

hierarchical simulation · 0.0
YearPublicationVenuePosition
1982 VISTA: A VLSI CAD System
abstract
The VISTA computer-aided design (CAD) system is described. The architecture of VISTA is introduced and the interrelationships between its modules are detailed. Emphasis is placed on both an overview of the software and on unique algorithms. Particular attention is paid to advancements made in hierarchical simulation, semiconductor modeling, and verification.
Hal W. Daseking, Robert I. Gardner, Paul B. Weil
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1