EDBT 2026 Demo / reviewers in the wild / expert
Kei-Chun Li
dblp:38/4537
· DBLP profile ↗
5ranked-venue papers
2as first author
0since 2021 · last 2002
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 87% Parallel and multicore computing · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation
performance monitoring |
0.0 | 1 | 1998 | Dynamically Instrumenting Message-Passing Programs Using Virtual Clocks · HPDC 1998 |
Performance modeling and evaluation
program instrumentation |
0.0 | 1 | 1998 | Dynamically Instrumenting Message-Passing Programs Using Virtual Clocks · HPDC 1998 |
Parallel and multicore computing
message-passing programs |
0.0 | 1 | 1998 | Dynamically Instrumenting Message-Passing Programs Using Virtual Clocks · HPDC 1998 |
Methods — techniques the papers use, named apart from their topics
virtual clocks · 0.0logical clock approach · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2002 | WebCord - A Visualizing Tool for Enhancing Web-Based LearningabstractWeb browser bookmarks (also known as "favorites") predominate as the current approach to managing URLs. Yet these bookmarking schemes exhibit deficiencies that hinder effective organization and access to URLs. This paper describes WebCord, a visualizing tool for enhancing Web-based learning that allows the user to organizing and managing their URLs of interest by creating categories. Kei-Chun Li, Wai Ming Yip, Kit Kuen Raymond Yip |
ICCE | 1 |
| 2002 | A Web-Based CAL System on Computer Architecture and Assembly Language ProgrammingabstractThis paper introduces a CAL system on Computer Architecture and Assembly Language Programming. The ability of the system is to simulate a computer system that allows the student to understand the whole process from software programming to hardware execution. Multimedia and web-based technologies are applied in the system. The proposed system helps the student to connect theory to practice more easily and can reduce the number of laboratory hours needed. Kit Kuen Raymond Yip, Kei-Chun Li |
ICCE | 2 |
| 1999 | Supporting Scalable Performance Monitoring and Analysis of Parallel Programs
Kei-Chun Li, Kang Zhang 0001 |
J. Supercomput. | 1 |
| 1998 | Dynamically Instrumenting Message-Passing Programs Using Virtual ClocksabstractAnalysing and visualising the run time behaviour of a distributed program requires collecting performance data during its execution. This is usually done through program instrumentation that inserts trace recording instructions into the program. The intrusiveness of inserted extra code to the original program may make the existing errors vanish, or can cause new errors to appear. It will not only change the real time execution speed, but also change the probability of making particular non deterministic choices. W. Cai and S.J. Turner (1994) proposed a logical clock approach (LCA) to control the inter process communication. It uses a logical clock in each process to reflect the real time execution of the process when running without monitoring. Not relying on any special hardware, this approach achieves minimum intrusiveness and makes the monitoring effect on the original program completely independent from the amount of time spent on monitoring activities. A main problem with LCA is that in an event of non deterministic communication and when several processes wait on each other's logical clock to advance, a deadlock may occur. LCA uses a carrier null message algorithm to break the deadlock situation. But sending an extra null message will distort the event timing information. Therefore, LCA is only suitable for debugging rather than for performance tuning. We present a major improvement to LCA, which preserves the timing information without introducing any deadlock. Our improved approach can support both debugging and performance tuning. We call our clocks virtual clocks to avoid confusion. Kang Zhang 0001, Chengzheng Sun, Kei-Chun Li |
HPDC | 3 |
| 1997 | Experience with the design of a performance tuning tool for parallel programs
Su Te Lei, Kang Zhang 0001, Kei-Chun Li |
J. Syst. Softw. | 3 |