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Edward A. Snow

dblp:38/4615 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1981
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 80% Processor architecture and microarchitecture · 20%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › design for manufacturability › statistical design › statistical circuit design
performance variation modeling
0.011981
Implementation and Performance Evaluation of Computer Families · IEEE Trans. Computers 1981
Electronic design automation
design representation
0.011978
A technology-relative computer-aided design system: Abstract representations, transformations, and design tradeoffs · DAC 1978

Methods — techniques the papers use, named apart from their topics

microcycle timing model · 0.0memory read pause time model · 0.0
YearPublicationVenuePosition
1981 Implementation and Performance Evaluation of Computer Families
abstract
This correspondence proposes a model using microcycle and memory read pause times to account for variation in performance between members of a computer family. Wben applied to the DEC PDP-11 and IBM S/360-S/370 families, the model explains over 90 percent of the variation. This model is useful for initial family planning, as well as design of individual family members.
Edward A. Snow, Daniel P. Siewiorek
IEEE Trans. Computers1
1978 A technology-relative computer-aided design system: Abstract representations, transformations, and design tradeoffs
Edward A. Snow, Daniel P. Siewiorek, Donald E. Thomas
DAC1