Demo Data from EDBT 2026 / reviewers in the wild / expert
Yi Jin 0009
dblp:38/4674-9
· DBLP profile ↗
4ranked-venue papers
2as first author
1since 2021 · last 2021
0000-0001-6203-1281ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 2 first-authorSystems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Integrated circuit design · 47% Emerging computing paradigms · 40% Reconfigurable computing and FPGAs · 9% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms
optical computing |
0.4 | 3 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 Principles, structures, and implementation of reconfigurable ternary optical processors · Sci. China Inf. Sci. 2011 Principles and construction of MSD adder in ternary optical computer · Sci. China Inf. Sci. 2010 |
Integrated circuit design › digital circuit design › arithmetic circuit design
adder design |
0.2 | 1 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 |
Integrated circuit design
digital circuit design |
0.2 | 1 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 |
Integrated circuit design › digital arithmetic circuits › redundant adders
signed-digit adder |
0.2 | 1 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 |
Reconfigurable computing and FPGAs
reconfigurable architecture |
0.1 | 1 | 2011 | Principles, structures, and implementation of reconfigurable ternary optical processors · Sci. China Inf. Sci. 2011 |
Emerging computing paradigms › optical computing
ternary optical computer |
0.1 | 1 | 2010 | Principles and construction of MSD adder in ternary optical computer · Sci. China Inf. Sci. 2010 |
Integrated circuit design › digital arithmetic circuits
carry-free addition |
0.1 | 1 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 |
Processor architecture and microarchitecture
pipelining |
0.1 | 1 | 2014 | Design and Implementation of Modified Signed-Digit Adder · IEEE Trans. Computers 2014 |
Methods — techniques the papers use, named apart from their topics
ternary optical computing · 0.2pipeline mechanism · 0.2optical logic · 0.2reconfigurable processing · 0.1MSD addition · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2021 | The Design and Implementation of Reconfigurable Quaternary Logic Processor
Youdong Wu, Shan Ouyang 0003, Xunlei Chen, Yunfu Shen, Yi Jin 0009 |
PDCAT | 6 |
| 2014 | Design and Implementation of Modified Signed-Digit AdderabstractHow to fully apply the characteristics and advantages of light in numerical computation is an important issue that attracts many scholars. Though much research has been done in this field, how to design and realize specific applications or devices is still an issue to be solved. Based on this, we present an architecture and implementation method of modified signed-digit (MSD) optical adder from the point of applicability. In the implementation, we fully consider the different procedures of the MSD addition which including optical logical operation, results decoding, special storage area design, data feedback, control of light path, etc. Meanwhile, we also introduce pipeline mechanism which guarantees that the addition operation is an automatic and continuous process. This is a carry free adder design method which guarantees the addition has high data throughput. It is very suitable to fulfill the large-scale numerical computation. The experiment shows, the MSD adder not only has a reasonable and correct design, but also has high throughput rate, can work efficiently and steadily. Rong Shen, Yi Jin 0009, Yunfu Shen |
IEEE Trans. Computers | 3 |
| 2011 | Principles, structures, and implementation of reconfigurable ternary optical processors
Yi Jin 0009, Shan Ouyang 0003, Yunfu Shen, Xuemin Liu |
Sci. China Inf. Sci. | 1 |
| 2010 | Principles and construction of MSD adder in ternary optical computer
Yi Jin 0009, Yunfu Shen, Shiyi Xu, Guangtai Ding, Dongjian Yue, Haihang You |
Sci. China Inf. Sci. | 1 |